Age | Commit message (Collapse) | Author | |
---|---|---|---|
2022-08-17 | Update to critical-section 1.0, atomic-polyfill 1.0 | Dario Nieuwenhuis | |
2022-06-27 | Remove STM32L485 "ghost chips" | Dario Nieuwenhuis | |
2022-06-18 | Update to 2021 edition. (#820) | Dario Nieuwenhuis | |
2022-06-12 | Run rustfmt. | Dario Nieuwenhuis | |
2022-04-27 | Add bootloader to CI | Ulf Lilleengen | |
2022-04-27 | stm32: add stm32u5 GPDMA, SPIv4 support, add HIL tests. | Dario Nieuwenhuis | |
2022-03-28 | Convert chip name to upper case to fix rebuilds | Nikita Strygin | |
PR #665 made stm32-metapac rebuild when the chip definition was changed. Though it used the lowercase version of the chip name as a filename which probably worked fine on windows with its case-independent filesystem, but was causing constant rebuilds on linux | |||
2022-03-15 | Merge #667 | bors[bot] | |
667: Remove duplicate stm32-metapac/src/common.rs with chiptool r=Dirbaio a=nviennot There's a duplicate file common.rs with the chiptool crate. This PR makes the source of truth the one in chiptool. This PR is a good pair with https://github.com/embassy-rs/chiptool/pull/4 Co-authored-by: Nicolas Viennot <nicolas@viennot.biz> | |||
2022-03-15 | Remove duplicate stm32-metapac/src/common.rs with chiptool | Nicolas Viennot | |
2022-03-15 | Rebuild when the chip definition changes | Nicolas Viennot | |
2022-03-04 | docs: add metadata.embassy_docs to cargo tomls. | Dario Nieuwenhuis | |
2022-03-04 | stm32-metapac: add doc(html_no_source). | Dario Nieuwenhuis | |
The source files are unreadable because they're not fmt'd, and they take up a LOT of space when generating docs for all 1200 chips because they don't deduplicate. | |||
2022-02-26 | stm32-metapac: remove all macrotables, deduplicate metadata files. | Dario Nieuwenhuis | |
2022-02-09 | stm32-metapac: add option to generate chip metadata as a rust const. | Dario Nieuwenhuis | |
2022-01-13 | stm32-metapac: remove stm32gbk | Dario Nieuwenhuis | |
2021-11-24 | stm32-metapac: add `pac` feature to allow building only the macrotables. | Dario Nieuwenhuis | |
2021-11-23 | stm32: rename core features from _cmX to -cmX, cleanup gen. | Dario Nieuwenhuis | |
2021-11-02 | Adjust for STM32U5. | Bob McWhirter | |
2021-09-21 | Support for STM32L1 | Ulf Lilleengen | |
* Add RCC * Fix more issues with dash in chip names * Update stm32-data version * Add blinky and spi example | |||
2021-09-13 | Merge pull request #378 from numero-744/gen-features-using-rust-not-python | Dario Nieuwenhuis | |
Use our beloved Rust instead of Python | |||
2021-09-11 | fix(gen-features): keep data files order | Côme ALLART | |
2021-09-11 | Update lots of deps | Dario Nieuwenhuis | |
2021-09-05 | refactor(gen-features): use Rust instead of Python | Côme ALLART | |
Added support for /stm32-metapac | |||
2021-08-19 | Update cortex-m-rt to v0.7 for stm32, rp. | Dario Nieuwenhuis | |
2021-08-02 | Use an em bikeshed instead of an underscore bikeshed. | Bob McWhirter | |
2021-08-02 | Put the implicit memory.x behind a `memory_x` feature on embassy-stm32. | Bob McWhirter | |
2021-07-13 | Fix "can't find crate for std" for stm32-metapac-gen deps. | Dario Nieuwenhuis | |
2021-07-01 | Add USARTv3 support. | Bob McWhirter | |
2021-06-29 | Make the metapac gen enr/rst missing regs non-fatal to the build. | Bob McWhirter | |
Should be solved in a separate effort. | |||
2021-06-29 | Adjust example for RCC and DMA. | Bob McWhirter | |
2021-06-29 | Checkpoint with lifetime issues. | Bob McWhirter | |
2021-06-29 | Generate dma-related macro tables. | Bob McWhirter | |
2021-06-24 | Remove unused gpio_af from codegen | Thales Fragoso | |
2021-06-21 | Update stm32-data (adds DBGMCU to all chips) | Dario Nieuwenhuis | |
2021-06-16 | Add support for generating PAC for dual cores | Ulf Lilleengen | |
* Chips that have multiple cores will be exposed as chipname_corename, i.e. stm32wl55jc_cm4 * Chips that have single cores will use the chip family as feature name and pick the first and only core from the list * Add support for stm32wl55 chip family | |||
2021-06-15 | Use correct frequencies for timers | Ulf Lilleengen | |
2021-06-14 | Add wb55 clocks | Ulf Lilleengen | |
2021-06-14 | Add minimal RCC impls for L4 and F4 | Ulf Lilleengen | |
2021-06-14 | Provide a way for a peripheral to query its clock frequency | Ulf Lilleengen | |
Currently this looks up the frequency in the global singleton that must be initialized by the per-chip RCC implementation. At present, this is only done for the L0 family of chips. | |||
2021-06-11 | Refactor | Ulf Lilleengen | |
2021-06-10 | Special handling for timers instead | Ulf Lilleengen | |
2021-06-10 | Enable timer clock in RCC on timer start | Ulf Lilleengen | |
* Moves the tim2-specific code into macro which always uses TIM2 * For peripherals without clock specified, attempt to locate enable and reset registers in the RCC block matching the peripheral name. This could be useful for peripherals where deducing the clock name might not be feasible, but it remains to be tested with more chip families to see if it is sufficiently accurate. | |||
2021-06-10 | stm32-metapac: add new codegen, allows pregenerating the entire pac | Dario Nieuwenhuis | |
2021-06-09 | Make RCC lookup optional | Ulf Lilleengen | |
2021-06-09 | Cleanup and fix l4s | Ulf Lilleengen | |
2021-06-09 | Generate clock peripherals for all peripherals with register block | Ulf Lilleengen | |
Infers clock for a peripheral using the selected clock as a prefix, in order to work with split registers | |||
2021-06-08 | Handle other L4 variants | Ulf Lilleengen | |
2021-06-08 | Workaround for L4 | Ulf Lilleengen | |
2021-06-08 | Add workaround for STM32H7 | Ulf Lilleengen | |
2021-06-08 | Auto generate SPI v2 clock enable | Ulf Lilleengen | |
Adds RccPeripheral trait for peripherals implementing clock enable and reset for a given peripheral. Add macro table generting implementations of RccPeripheral for peripherals with clock set, currently restricted to SPI. |