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author | Ulf Lilleengen <ulf.lilleengen@gmail.com> | 2021-06-02 16:34:37 +0200 |
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committer | Ulf Lilleengen <ulf.lilleengen@gmail.com> | 2021-06-08 17:20:29 +0200 |
commit | ee3b82b74347cef97b58fee075972e175f98874b (patch) | |
tree | 328641858941b22f38814b9e0f4bb5a797998d5b /stm32-metapac | |
parent | af0f8082f079bb80d8b478331ff505f5462a9120 (diff) | |
download | embassy-ee3b82b74347cef97b58fee075972e175f98874b.zip |
Auto generate SPI v2 clock enable
Adds RccPeripheral trait for peripherals implementing clock enable and reset for a given peripheral.
Add macro table generting implementations of RccPeripheral for peripherals with clock set, currently restricted to SPI.
Diffstat (limited to 'stm32-metapac')
-rw-r--r-- | stm32-metapac/build.rs | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/stm32-metapac/build.rs b/stm32-metapac/build.rs index 083e06bf..91b76b2a 100644 --- a/stm32-metapac/build.rs +++ b/stm32-metapac/build.rs @@ -136,6 +136,7 @@ fn main() { let mut interrupt_table: Vec<Vec<String>> = Vec::new(); let mut peripherals_table: Vec<Vec<String>> = Vec::new(); let mut peripheral_pins_table: Vec<Vec<String>> = Vec::new(); + let mut peripheral_rcc_table: Vec<Vec<String>> = Vec::new(); let dma_base = chip .peripherals @@ -216,6 +217,19 @@ fn main() { }; assert_eq!(p.address, dma_base + dma_stride * dma_num); } + "spi" => { + if let Some(clock) = &p.clock { + let reg = clock.to_ascii_lowercase(); + let field = name.to_ascii_lowercase(); + peripheral_rcc_table.push(vec![ + name.clone(), + format!("{}enr", reg), + format!("{}rstr", reg), + format!("set_{}en", field), + format!("set_{}rst", field), + ]); + } + } _ => {} } } @@ -255,6 +269,7 @@ fn main() { make_table(&mut extra, "peripherals", &peripherals_table); make_table(&mut extra, "peripheral_versions", &peripheral_version_table); make_table(&mut extra, "peripheral_pins", &peripheral_pins_table); + make_table(&mut extra, "peripheral_rcc", &peripheral_rcc_table); for (module, version) in peripheral_versions { println!("loading {} {}", module, version); |