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| author | Ulf Lilleengen <ulf.lilleengen@gmail.com> | 2021-06-11 09:19:02 +0200 |
|---|---|---|
| committer | Ulf Lilleengen <ulf.lilleengen@gmail.com> | 2021-06-14 11:33:11 +0200 |
| commit | 952f525af5bfbb800ab4593b77e69b8b13f95b16 (patch) | |
| tree | ea871dd6729a3cf365d8331a60d46a87a3e32aa4 /stm32-metapac | |
| parent | 85f172dd93227e637724d37e76bbcd7d886678f9 (diff) | |
| download | embassy-952f525af5bfbb800ab4593b77e69b8b13f95b16.zip | |
Provide a way for a peripheral to query its clock frequency
Currently this looks up the frequency in the global singleton that must
be initialized by the per-chip RCC implementation. At present, this is
only done for the L0 family of chips.
Diffstat (limited to 'stm32-metapac')
| -rw-r--r-- | stm32-metapac/gen/src/lib.rs | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/stm32-metapac/gen/src/lib.rs b/stm32-metapac/gen/src/lib.rs index 399840c5..ae01f1e8 100644 --- a/stm32-metapac/gen/src/lib.rs +++ b/stm32-metapac/gen/src/lib.rs @@ -287,8 +287,23 @@ pub fn gen(options: Options) { match (en, rst) { (Some((enable_reg, enable_field)), Some((reset_reg, reset_field))) => { + let clock = if clock_prefix == "" { + let re = Regex::new("([A-Z]+\\d*).*").unwrap(); + if !re.is_match(enable_reg) { + panic!( + "unable to derive clock name from register name {}", + enable_reg + ); + } else { + let caps = re.captures(enable_reg).unwrap(); + caps.get(1).unwrap().as_str() + } + } else { + clock_prefix + }; peripheral_rcc_table.push(vec![ name.clone(), + clock.to_ascii_lowercase(), enable_reg.to_ascii_lowercase(), reset_reg.to_ascii_lowercase(), format!("set_{}", enable_field.to_ascii_lowercase()), |