Fix a few typos in ports/cad.

10 files changed, 11 insertions, 11 deletions

diff --git a/cad/cider/pkg-descr b/cad/cider/pkg-descr
index 6995f341ff20..5b99e5a2ca28 100644
--- a/cad/cider/pkg-descr
+++ b/cad/cider/pkg-descr
@@ -27,7 +27,7 @@ lines, and the five most common semiconductor devices: diodes, BJTs, JFETs,
 MESFETs, and MOSFETs.
 
 	From the SPICE3 Version3f3 User's Manual.
-	This is availble as a postscript document from:
+	This is available as a postscript document from:
 		ftp://ic.eecs.berkeley.edu/pub/Spice3/um.3f3.ps
 	or you can read the online documentation on the homepage.
 
diff --git a/cad/electric-ng/pkg-descr b/cad/electric-ng/pkg-descr
index fb859c551652..478e407db215 100644
--- a/cad/electric-ng/pkg-descr
+++ b/cad/electric-ng/pkg-descr
@@ -24,7 +24,7 @@ Electric can display these types of design:
  - Digital filters, Temporal logic
  - Artwork
 
-For real funcionality, one should consider installing
+For real functionality, one should consider installing
 support simulation software such as cad/spice.
 
 Author:	Static Free Software & Sun Microsystems, Inc.
diff --git a/cad/electric/pkg-descr b/cad/electric/pkg-descr
index 6f8b3195fefa..e67c6d20c3f2 100644
--- a/cad/electric/pkg-descr
+++ b/cad/electric/pkg-descr
@@ -16,7 +16,7 @@ Electric handles these file formats:
    DXF I/O 
    PostScript, HPGL, and QuickDraw output 
 
-For real funcionality, one should consider installing
+For real functionality, one should consider installing
 support simulation software such as cad/spice.
 
 WWW: http://www.gnu.org/software/electric/electric.html
diff --git a/cad/geda-symcheck/pkg-descr b/cad/geda-symcheck/pkg-descr
index 6eec22512d3b..cea91210570e 100644
--- a/cad/geda-symcheck/pkg-descr
+++ b/cad/geda-symcheck/pkg-descr
@@ -1,3 +1,3 @@
-gsymcheck is the gEDA symbol checking utilty
+gsymcheck is the gEDA symbol checking utility
 
 WWW: http://www.geda.seul.org
diff --git a/cad/iverilog/pkg-descr b/cad/iverilog/pkg-descr
index 39739afe9bc5..cdc2c152ac1e 100644
--- a/cad/iverilog/pkg-descr
+++ b/cad/iverilog/pkg-descr
@@ -1,5 +1,5 @@
 Icarus Verilog is a Verilog simulation and synthesis tool. It
-operates as a compiler, compiling source code writen in Verilog
+operates as a compiler, compiling source code written in Verilog
 (IEEE-1364) into some target format. For batch simulation, the
 compiler can generate C++ code that is compiled and linked with
 a run time library (called "vvm") then executed as a command to
diff --git a/cad/linux-eagle/pkg-descr b/cad/linux-eagle/pkg-descr
index 2845aafb052e..c49420289473 100644
--- a/cad/linux-eagle/pkg-descr
+++ b/cad/linux-eagle/pkg-descr
@@ -20,7 +20,7 @@ o Support is only available via email or through our forum (no fax or phone
   support).
 o Use is limited to non-profit applications or evaluation purposes.
 
-Apart from these limitiations the EAGLE Light Edition can do anything the
+Apart from these limitations the EAGLE Light Edition can do anything the
 Professional Edition can do. You can even load, view and print drawings that
 exceed these limits!
 
diff --git a/cad/linux-eagle5/pkg-descr b/cad/linux-eagle5/pkg-descr
index 2845aafb052e..c49420289473 100644
--- a/cad/linux-eagle5/pkg-descr
+++ b/cad/linux-eagle5/pkg-descr
@@ -20,7 +20,7 @@ o Support is only available via email or through our forum (no fax or phone
   support).
 o Use is limited to non-profit applications or evaluation purposes.
 
-Apart from these limitiations the EAGLE Light Edition can do anything the
+Apart from these limitations the EAGLE Light Edition can do anything the
 Professional Edition can do. You can even load, view and print drawings that
 exceed these limits!
 
diff --git a/cad/pdnmesh/pkg-descr b/cad/pdnmesh/pkg-descr
index 80154abf75ad..b74caf9d06f1 100644
--- a/cad/pdnmesh/pkg-descr
+++ b/cad/pdnmesh/pkg-descr
@@ -16,9 +16,9 @@ The features of the program are as follows.
     * Eigenvalue solution using LAPACK.
     * (Optionally) Eigenvalue solution using QR iteration with shifts.
     * Generating plots of contours, mesh and gradient on screen.
-    * Generating Encapsulated Postscript plots of countours and mesh.
+    * Generating Encapsulated Postscript plots of contours and mesh.
     * Generating a data file of the mesh to be used by other solvers.
     * Can import DXF files generated by CAD programs.
-    * GUI is avaibale with glut and GTK/GTKGLExt. Needs OpenGL.
+    * GUI is available with glut and GTK/GTKGLExt. Needs OpenGL.
 
 WWW: http://pdnmesh.sourceforge.net/
diff --git a/cad/tkgate/pkg-descr b/cad/tkgate/pkg-descr
index 096406393fe9..da20f774157a 100644
--- a/cad/tkgate/pkg-descr
+++ b/cad/tkgate/pkg-descr
@@ -5,7 +5,7 @@ design.  The simulator can be controlled either interactively or
 through a simulation script.  Memory contents can be loaded from
 files, and a microcode/macrocode compiler (gmac) is included to create
 tkgate memory files from a high-level description.  The simulator
-supports continous simulation, single step simulation (by clock or
+supports continuous simulation, single step simulation (by clock or
 epoch) and breakpoints.  Save files are in a Verilog-like format.
 
 TkGate also includes a number of tutorial and example circuits which
diff --git a/cad/transcalc/pkg-descr b/cad/transcalc/pkg-descr
index 716b25953d1e..46b9920294d6 100644
--- a/cad/transcalc/pkg-descr
+++ b/cad/transcalc/pkg-descr
@@ -8,7 +8,7 @@ used. Transcalc is built using the GIMP toolkit (GTK) for its GUI interface.
 
 For each type of transmission line, using dialog boxes, you can enter values
 for the various parameters, and either calculate its electrical properties
-(analyze), or use the given electrical requirements to sythesize physical
+(analyze), or use the given electrical requirements to synthesize physical
 parameters of the required transmission line.
 
 Available transmission lines (this list will expand with subsequent releases):