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authorJohn Gentile <johncgentile17@gmail.com>2019-01-27 04:46:33 -0500
committerw0rp <w0rp@users.noreply.github.com>2019-01-27 09:46:33 +0000
commitb8bf7b220d0f7ab461ed830b125f9dbc42a7836a (patch)
tree0f4b112c5c082b156ca8393d3242cb3fe762bfd8 /ale_linters/verilog
parent91c1fc3bb396dfcb495c484db7d39193df8826eb (diff)
downloadale-b8bf7b220d0f7ab461ed830b125f9dbc42a7836a.zip
Add VHDL Support & Newer Verilog Linters (#2229)
* Added VHDL file support with ghdl compiler * Update ghdl.vim * Create vcom.vim * Create xvhdl.vim * Update xvlog.vim * Added documentation for VHDL & Verilog linters * Added tests to VHDL & Verilog linters
Diffstat (limited to 'ale_linters/verilog')
-rw-r--r--ale_linters/verilog/vlog.vim36
-rw-r--r--ale_linters/verilog/xvlog.vim35
2 files changed, 71 insertions, 0 deletions
diff --git a/ale_linters/verilog/vlog.vim b/ale_linters/verilog/vlog.vim
new file mode 100644
index 00000000..1a1fcb6a
--- /dev/null
+++ b/ale_linters/verilog/vlog.vim
@@ -0,0 +1,36 @@
+" Author: John Gentile <johncgentile17@gmail.com>
+" Description: Adds support for Mentor Graphics Questa/ModelSim `vlog` Verilog compiler/checker
+
+call ale#Set('verilog_vlog_executable', 'vlog')
+" See `$ vlog -h` for more options
+call ale#Set('verilog_vlog_options', '-quiet -lint')
+
+function! ale_linters#verilog#vlog#GetCommand(buffer) abort
+ return '%e ' . ale#Pad(ale#Var(a:buffer, 'verilog_vlog_options')) . ' %t'
+endfunction
+
+function! ale_linters#verilog#vlog#Handle(buffer, lines) abort
+ "Matches patterns like the following:
+ "** Warning: add.v(7): (vlog-2623) Undefined variable: C.
+ "** Error: file.v(1): (vlog-13294) Identifier must be declared with a port mode: C.
+ let l:pattern = '^**\s\(\w*\):[a-zA-Z0-9\-\.\_\/ ]\+(\(\d\+\)):\s\+\(.*\)'
+ let l:output = []
+
+ for l:match in ale#util#GetMatches(a:lines, l:pattern)
+ call add(l:output, {
+ \ 'lnum': l:match[2] + 0,
+ \ 'type': l:match[1] is? 'Error' ? 'E' : 'W',
+ \ 'text': l:match[3],
+ \})
+ endfor
+
+ return l:output
+endfunction
+
+call ale#linter#Define('verilog', {
+\ 'name': 'vlog',
+\ 'output_stream': 'stdout',
+\ 'executable_callback': ale#VarFunc('verilog_vlog_executable'),
+\ 'command_callback': 'ale_linters#verilog#vlog#GetCommand',
+\ 'callback': 'ale_linters#verilog#vlog#Handle',
+\})
diff --git a/ale_linters/verilog/xvlog.vim b/ale_linters/verilog/xvlog.vim
new file mode 100644
index 00000000..db2227cd
--- /dev/null
+++ b/ale_linters/verilog/xvlog.vim
@@ -0,0 +1,35 @@
+" Author: John Gentile <johncgentile17@gmail.com>
+" Description: Adds support for Xilinx Vivado `xvlog` Verilog compiler/checker
+
+call ale#Set('verilog_xvlog_executable', 'xvlog')
+call ale#Set('verilog_xvlog_options', '')
+
+function! ale_linters#verilog#xvlog#GetCommand(buffer) abort
+ return '%e ' . ale#Pad(ale#Var(a:buffer, 'verilog_xvlog_options')) . ' %t'
+endfunction
+
+function! ale_linters#verilog#xvlog#Handle(buffer, lines) abort
+ "Matches patterns like the following:
+ " ERROR: [VRFC 10-1412] syntax error near output [/path/to/file.v:5]
+ let l:pattern = '^ERROR:\s\+\(\[.*\)\[.*:\([0-9]\+\)\]'
+ let l:output = []
+
+ " NOTE: `xvlog` only prints 'INFO' and 'ERROR' messages
+ for l:match in ale#util#GetMatches(a:lines, l:pattern)
+ call add(l:output, {
+ \ 'lnum': l:match[2] + 0,
+ \ 'type': 'E',
+ \ 'text': l:match[1],
+ \})
+ endfor
+
+ return l:output
+endfunction
+
+call ale#linter#Define('verilog', {
+\ 'name': 'xvlog',
+\ 'output_stream': 'stdout',
+\ 'executable_callback': ale#VarFunc('verilog_xvlog_executable'),
+\ 'command_callback': 'ale_linters#verilog#xvlog#GetCommand',
+\ 'callback': 'ale_linters#verilog#xvlog#Handle',
+\})