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2021-12-21tcg/loongarch64: Register the JITWANG Xuerui
2021-12-21tcg/loongarch64: Implement tcg_target_initWANG Xuerui
2021-12-21tcg/loongarch64: Implement exit_tb/goto_tbWANG Xuerui
2021-12-21tcg/loongarch64: Implement tcg_target_qemu_prologueWANG Xuerui
2021-12-21tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st opsWANG Xuerui
2021-12-21tcg/loongarch64: Implement simple load/store opsWANG Xuerui
2021-12-21tcg/loongarch64: Implement tcg_out_callWANG Xuerui
2021-12-21tcg/loongarch64: Implement setcond opsWANG Xuerui
2021-12-21tcg/loongarch64: Implement br/brcond opsWANG Xuerui
2021-12-21tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu opsWANG Xuerui
2021-12-21tcg/loongarch64: Implement add/sub opsWANG Xuerui
2021-12-21tcg/loongarch64: Implement shl/shr/sar/rotl/rotr opsWANG Xuerui
2021-12-21tcg/loongarch64: Implement clz/ctz opsWANG Xuerui
2021-12-21tcg/loongarch64: Implement bswap{16,32,64} opsWANG Xuerui
2021-12-21tcg/loongarch64: Implement deposit/extract opsWANG Xuerui
2021-12-21tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc opsWANG Xuerui
2021-12-21tcg/loongarch64: Implement sign-/zero-extension opsWANG Xuerui
2021-12-21tcg/loongarch64: Implement goto_ptrWANG Xuerui
2021-12-21tcg/loongarch64: Implement tcg_out_mov and tcg_out_moviWANG Xuerui
2021-12-21tcg/loongarch64: Implement the memory barrier opWANG Xuerui
2021-12-21tcg/loongarch64: Implement necessary relocation operationsWANG Xuerui
2021-12-21tcg/loongarch64: Define the operand constraintsWANG Xuerui
2021-12-21tcg/loongarch64: Add register names, allocation order and input/output setsWANG Xuerui
2021-12-21tcg/loongarch64: Add generated instruction opcodes and encoding helpersWANG Xuerui
2021-12-21tcg/loongarch64: Add the tcg-target.h fileWANG Xuerui