summaryrefslogtreecommitdiff
path: root/embassy-stm32/src/adc/v2.rs
blob: 25b7ba9670b0b08c87e0fb79cd2dffd490b207fd (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
use core::marker::PhantomData;

use embassy_hal_common::into_ref;
use embedded_hal_02::blocking::delay::DelayUs;

use crate::adc::{AdcPin, Instance};
use crate::time::Hertz;
use crate::Peripheral;

/// Default VREF voltage used for sample conversion to millivolts.
pub const VREF_DEFAULT_MV: u32 = 3300;
/// VREF voltage used for factory calibration of VREFINTCAL register.
pub const VREF_CALIB_MV: u32 = 3300;

#[cfg(not(any(rcc_f4, rcc_f7)))]
fn enable() {
    todo!()
}

#[cfg(any(rcc_f4, rcc_f7))]
fn enable() {
    critical_section::with(|_| unsafe {
        // TODO do not enable all adc clocks if not needed
        crate::pac::RCC.apb2enr().modify(|w| w.set_adc1en(true));
        crate::pac::RCC.apb2enr().modify(|w| w.set_adc2en(true));
        crate::pac::RCC.apb2enr().modify(|w| w.set_adc3en(true));
    });
}

pub enum Resolution {
    TwelveBit,
    TenBit,
    EightBit,
    SixBit,
}

impl Default for Resolution {
    fn default() -> Self {
        Self::TwelveBit
    }
}

impl Resolution {
    fn res(&self) -> crate::pac::adc::vals::Res {
        match self {
            Resolution::TwelveBit => crate::pac::adc::vals::Res::TWELVEBIT,
            Resolution::TenBit => crate::pac::adc::vals::Res::TENBIT,
            Resolution::EightBit => crate::pac::adc::vals::Res::EIGHTBIT,
            Resolution::SixBit => crate::pac::adc::vals::Res::SIXBIT,
        }
    }

    pub fn to_max_count(&self) -> u32 {
        match self {
            Resolution::TwelveBit => (1 << 12) - 1,
            Resolution::TenBit => (1 << 10) - 1,
            Resolution::EightBit => (1 << 8) - 1,
            Resolution::SixBit => (1 << 6) - 1,
        }
    }
}

pub struct VrefInt;
impl<T: Instance> AdcPin<T> for VrefInt {}
impl<T: Instance> super::sealed::AdcPin<T> for VrefInt {
    fn channel(&self) -> u8 {
        17
    }
}

pub struct Temperature;
impl<T: Instance> AdcPin<T> for Temperature {}
impl<T: Instance> super::sealed::AdcPin<T> for Temperature {
    fn channel(&self) -> u8 {
        16
    }
}

pub struct Vbat;
impl<T: Instance> AdcPin<T> for Vbat {}
impl<T: Instance> super::sealed::AdcPin<T> for Vbat {
    fn channel(&self) -> u8 {
        18
    }
}

/// ADC sample time
///
/// The default setting is 3 ADC clock cycles.
#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
pub enum SampleTime {
    Cycles3 = 0b000,
    Cycles15 = 0b001,
    Cycles28 = 0b010,
    Cycles56 = 0b011,
    Cycles85 = 0b100,
    Cycles112 = 0b101,
    Cycles144 = 0b110,
    Cycles480 = 0b111,
}

impl SampleTime {
    pub(crate) fn sample_time(&self) -> crate::pac::adc::vals::Smp {
        match self {
            SampleTime::Cycles3 => crate::pac::adc::vals::Smp::CYCLES3,
            SampleTime::Cycles15 => crate::pac::adc::vals::Smp::CYCLES15,
            SampleTime::Cycles28 => crate::pac::adc::vals::Smp::CYCLES28,
            SampleTime::Cycles56 => crate::pac::adc::vals::Smp::CYCLES56,
            SampleTime::Cycles85 => crate::pac::adc::vals::Smp::CYCLES84,
            SampleTime::Cycles112 => crate::pac::adc::vals::Smp::CYCLES112,
            SampleTime::Cycles144 => crate::pac::adc::vals::Smp::CYCLES144,
            SampleTime::Cycles480 => crate::pac::adc::vals::Smp::CYCLES480,
        }
    }
}

impl Default for SampleTime {
    fn default() -> Self {
        Self::Cycles3
    }
}

enum Prescaler {
    Div2,
    Div4,
    Div6,
    Div8,
}

impl Prescaler {
    fn from_pclk2(freq: Hertz) -> Self {
        // Datasheet for both F4 and F7 specifies min frequency 0.6 MHz, typ freq. 30 MHz and max 36 MHz.
        const MAX_FREQUENCY: Hertz = Hertz(36_000_000);
        let raw_div = freq.0 / MAX_FREQUENCY.0;
        match raw_div {
            0..=1 => Self::Div2,
            2..=3 => Self::Div4,
            4..=5 => Self::Div6,
            6..=7 => Self::Div8,
            _ => panic!("Selected PCLK2 frequency is too high for ADC with largest possible prescaler."),
        }
    }

    fn adcpre(&self) -> crate::pac::adccommon::vals::Adcpre {
        match self {
            Prescaler::Div2 => crate::pac::adccommon::vals::Adcpre::DIV2,
            Prescaler::Div4 => crate::pac::adccommon::vals::Adcpre::DIV4,
            Prescaler::Div6 => crate::pac::adccommon::vals::Adcpre::DIV6,
            Prescaler::Div8 => crate::pac::adccommon::vals::Adcpre::DIV8,
        }
    }
}

pub struct Adc<'d, T: Instance> {
    sample_time: SampleTime,
    vref_mv: u32,
    resolution: Resolution,
    phantom: PhantomData<&'d mut T>,
}

impl<'d, T> Adc<'d, T>
where
    T: Instance,
{
    pub fn new(_peri: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u32>) -> Self {
        into_ref!(_peri);
        enable();

        let presc = unsafe { Prescaler::from_pclk2(crate::rcc::get_freqs().apb2) };
        unsafe {
            T::common_regs().ccr().modify(|w| w.set_adcpre(presc.adcpre()));
        }

        unsafe {
            // disable before config is set
            T::regs().cr2().modify(|reg| {
                reg.set_adon(crate::pac::adc::vals::Adon::DISABLED);
            });
        }

        delay.delay_us(20); // TODO?

        Self {
            sample_time: Default::default(),
            resolution: Resolution::default(),
            vref_mv: VREF_DEFAULT_MV,
            phantom: PhantomData,
        }
    }

    pub fn set_sample_time(&mut self, sample_time: SampleTime) {
        self.sample_time = sample_time;
    }

    pub fn set_resolution(&mut self, resolution: Resolution) {
        self.resolution = resolution;
    }

    /// Set VREF value in millivolts. This value is used for [to_millivolts()] sample conversion.
    ///
    /// Use this if you have a known precise VREF (VDDA) pin reference voltage.
    pub fn set_vref_mv(&mut self, vref_mv: u32) {
        self.vref_mv = vref_mv;
    }

    /// Convert a measurement to millivolts
    pub fn to_millivolts(&self, sample: u16) -> u16 {
        ((u32::from(sample) * self.vref_mv) / self.resolution.to_max_count()) as u16
    }

    /// Perform a single conversion.
    fn convert(&mut self) -> u16 {
        unsafe {
            // clear end of conversion flag
            T::regs().sr().modify(|reg| {
                reg.set_eoc(crate::pac::adc::vals::Eoc::NOTCOMPLETE);
            });

            // Start conversion
            T::regs().cr2().modify(|reg| {
                reg.set_swstart(true);
            });

            while T::regs().sr().read().strt() == crate::pac::adc::vals::Strt::NOTSTARTED {
                // spin //wait for actual start
            }
            while T::regs().sr().read().eoc() == crate::pac::adc::vals::Eoc::NOTCOMPLETE {
                // spin //wait for finish
            }

            T::regs().dr().read().0 as u16
        }
    }

    pub fn read<P>(&mut self, pin: &mut P) -> u16
    where
        P: AdcPin<T>,
        P: crate::gpio::sealed::Pin,
    {
        unsafe {
            // dissable ADC
            T::regs().cr2().modify(|reg| {
                reg.set_swstart(false);
            });
            T::regs().cr2().modify(|reg| {
                reg.set_adon(crate::pac::adc::vals::Adon::DISABLED);
            });

            pin.set_as_analog();

            // Configure ADC
            T::regs().cr1().modify(|reg| reg.set_res(self.resolution.res()));

            // Select channel
            T::regs().sqr3().write(|reg| reg.set_sq(0, pin.channel()));

            // Configure channel
            Self::set_channel_sample_time(pin.channel(), self.sample_time);

            // enable adc
            T::regs().cr2().modify(|reg| {
                reg.set_adon(crate::pac::adc::vals::Adon::ENABLED);
            });

            let val = self.convert();

            // dissable ADC
            T::regs().cr2().modify(|reg| {
                reg.set_swstart(false);
            });
            T::regs().cr2().modify(|reg| {
                reg.set_adon(crate::pac::adc::vals::Adon::DISABLED);
            });

            val
        }
    }

    unsafe fn set_channel_sample_time(ch: u8, sample_time: SampleTime) {
        if ch <= 9 {
            T::regs()
                .smpr2()
                .modify(|reg| reg.set_smp(ch as _, sample_time.sample_time()));
        } else {
            T::regs()
                .smpr1()
                .modify(|reg| reg.set_smp((ch - 10) as _, sample_time.sample_time()));
        }
    }
}