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authorBen Gamari <ben@smart-cactus.org>2021-07-30 16:48:13 -0400
committerDario Nieuwenhuis <dirbaio@dirbaio.net>2021-08-20 00:15:11 +0200
commite2f71ffbbdeac4f64b0468fc7e93452388c16eee (patch)
treec88ac34d8a25021a0257966bf8aa3b918c8ac374 /stm32-metapac-gen
parent174c51f09707b8a475382071f99e0d9c44f93ab7 (diff)
downloadembassy-e2f71ffbbdeac4f64b0468fc7e93452388c16eee.zip
Add support for STM32G0
Diffstat (limited to 'stm32-metapac-gen')
-rw-r--r--stm32-metapac-gen/src/lib.rs4
1 files changed, 3 insertions, 1 deletions
diff --git a/stm32-metapac-gen/src/lib.rs b/stm32-metapac-gen/src/lib.rs
index 8646accf..390793a5 100644
--- a/stm32-metapac-gen/src/lib.rs
+++ b/stm32-metapac-gen/src/lib.rs
@@ -444,7 +444,9 @@ pub fn gen(options: Options) {
Some(clock) => clock.as_str(),
None => {
// No clock was specified, derive the clock name from the enable register name.
- Regex::new("([A-Z]+\\d*).*")
+ // N.B. STM32G0 has only one APB bus but split ENR registers
+ // (e.g. APBENR1).
+ Regex::new("([A-Z]+\\d*)ENR\\d*")
.unwrap()
.captures(enable_reg)
.unwrap()