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authorUlf Lilleengen <ulf.lilleengen@gmail.com>2021-09-15 13:35:00 +0200
committerUlf Lilleengen <ulf.lilleengen@gmail.com>2021-09-15 13:58:01 +0200
commit840a83e196ecf698399ca38466087050ca5b15f1 (patch)
tree4efe5084a77b61efe60560d5e731ad9f0fbdadf1 /stm32-metapac-gen
parentfb697a265752644d835edce27efbb20d5557b297 (diff)
downloadembassy-840a83e196ecf698399ca38466087050ca5b15f1.zip
Add support for chip definitions with a dash
Diffstat (limited to 'stm32-metapac-gen')
-rw-r--r--stm32-metapac-gen/src/lib.rs16
1 files changed, 14 insertions, 2 deletions
diff --git a/stm32-metapac-gen/src/lib.rs b/stm32-metapac-gen/src/lib.rs
index 390793a5..e802ba4f 100644
--- a/stm32-metapac-gen/src/lib.rs
+++ b/stm32-metapac-gen/src/lib.rs
@@ -214,8 +214,20 @@ pub fn gen(options: Options) {
for chip_name in &options.chips {
let mut s = chip_name.split('_');
- let chip_name: &str = s.next().unwrap();
- let core_name: Option<&str> = s.next();
+ let mut chip_name: String = s.next().unwrap().to_string();
+ let core_name: Option<&str> = if let Some(c) = s.next() {
+ if !c.starts_with("CM") {
+ println!("Core not detected, adding as variant");
+ chip_name.push_str("-");
+ chip_name.push_str(c);
+ None
+ } else {
+ println!("Detected core {}", c);
+ Some(c)
+ }
+ } else {
+ None
+ };
chip_cores.insert(
chip_name.to_string(),