1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
|
#include "i8253.h"
#include "i386.h"
#include "IO.h"
#include "VGA.h"
#include "Task.h"
#include "system.h"
#include "PIC.h"
#define IRQ_TIMER 0
extern "C" void tick_ISR();
extern "C" void clock_handle();
extern volatile DWORD state_dump;
asm(
".globl tick_ISR \n"
".globl state_dump \n"
"state_dump: \n"
".long 0\n"
"tick_ISR: \n"
" pusha\n"
" pushw %ds\n"
" pushw %es\n"
" pushw %fs\n"
" pushw %gs\n"
" pushw %ss\n"
" pushw %ss\n"
" pushw %ss\n"
" pushw %ss\n"
" popw %ds\n"
" popw %es\n"
" popw %fs\n"
" popw %gs\n"
" mov %esp, state_dump\n"
" call clock_handle\n"
" popw %gs\n"
" popw %fs\n"
" popw %es\n"
" popw %ds\n"
" popa\n"
" iret\n"
);
/* Timer related ports */
#define TIMER0_CTL 0x40
#define TIMER1_CTL 0x41
#define TIMER2_CTL 0x42
#define PIT_CTL 0x43
/* Building blocks for PIT_CTL */
#define TIMER0_SELECT 0x00
#define TIMER1_SELECT 0x40
#define TIMER2_SELECT 0x80
#define MODE_COUNTDOWN 0x00
#define MODE_ONESHOT 0x02
#define MODE_RATE 0x04
#define MODE_SQUARE_WAVE 0x06
#define WRITE_WORD 0x30
/* Miscellaneous */
#define BASE_FREQUENCY 1193182
struct RegisterDump {
WORD gs;
WORD fs;
WORD es;
WORD ds;
DWORD edi;
DWORD esi;
DWORD ebp;
DWORD esp;
DWORD ebx;
DWORD edx;
DWORD ecx;
DWORD eax;
DWORD eip;
WORD cs;
WORD __csPadding;
DWORD eflags;
} PACKED;
void clock_handle()
{
IRQHandlerScope scope(IRQ_TIMER);
if (!current)
return;
system.uptime++;
if (current->tick())
return;
auto& regs = *reinterpret_cast<RegisterDump*>(state_dump);
current->tss().gs = regs.gs;
current->tss().fs = regs.fs;
current->tss().es = regs.es;
current->tss().ds = regs.ds;
current->tss().edi = regs.edi;
current->tss().esi = regs.esi;
current->tss().ebp = regs.ebp;
current->tss().ebx = regs.ebx;
current->tss().edx = regs.edx;
current->tss().ecx = regs.ecx;
current->tss().eax = regs.eax;
current->tss().eip = regs.eip;
current->tss().cs = regs.cs;
current->tss().eflags = regs.eflags;
#if 0
BYTE a = vga_get_attr();
WORD foo = vga_get_cursor();
vga_set_attr(0x50);
vga_set_cursor(1600);
kprintf("Task %u interrupted at %x\n", current->pid(), regs.eip );
kprintf("EAX=%x EBX=%x ECX=%x EDX=%x\n", regs.eax, regs.ebx, regs.ecx, regs.edx);
kprintf("ESI=%x EDI=%x EBP=%x ESP=%x\n", regs.esi, regs.edi, regs.ebp, regs.esp);
kprintf("FLAGS=%x", regs.eflags);
vga_set_cursor(foo);
vga_set_attr(a);
#endif
// Compute task ESP.
// Add 12 for CS, EIP, EFLAGS (interrupt mechanic)
current->tss().esp = regs.esp + 12;
// Prepare a new task to run.
sched();
// Set the NT (nested task) flag.
// sched() has LTRed a dummy task with a backlink to the next task.
// This is probably super slow/stupid, but I'm just learning...
asm(
"pushf\n"
"orl $0x00004000, (%esp)\n"
"popf\n"
);
}
namespace PIT {
void initialize()
{
WORD timer_reload;
IO::out8(PIT_CTL, TIMER0_SELECT | WRITE_WORD | MODE_SQUARE_WAVE);
timer_reload = (BASE_FREQUENCY / TICKS_PER_SECOND);
/* Send LSB and MSB of timer reload value. */
kprintf("PIT(i8253): %u Hz, square wave (%x)\n", TICKS_PER_SECOND, timer_reload);
IO::out8(TIMER0_CTL, LSB(timer_reload));
IO::out8(TIMER0_CTL, MSB(timer_reload));
registerInterruptHandler(IRQ_VECTOR_BASE + IRQ_TIMER, tick_ISR);
PIC::enable(IRQ_TIMER);
}
}
|
