blob: f4074e90cea8758b9481ab3a0deaa5d0ae17a845 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
|
/*
* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#include <Kernel/ACPI/Parser.h>
#include <Kernel/CommandLine.h>
#include <Kernel/IO.h>
#include <Kernel/PCI/IOAccess.h>
#include <Kernel/PCI/Initializer.h>
#include <Kernel/PCI/MMIOAccess.h>
#include <Kernel/PCI/WindowedMMIOAccess.h>
#include <Kernel/Panic.h>
#include <Kernel/Sections.h>
namespace Kernel {
namespace PCI {
static bool test_pci_io();
UNMAP_AFTER_INIT static PCIAccessLevel detect_optimal_access_type(PCIAccessLevel boot_determined)
{
if (!ACPI::is_enabled() || ACPI::Parser::the()->find_table("MCFG").is_null())
return PCIAccessLevel::IOAddressing;
if (boot_determined != PCIAccessLevel::IOAddressing)
return boot_determined;
if (test_pci_io())
return PCIAccessLevel::IOAddressing;
PANIC("No PCI bus access method detected!");
}
UNMAP_AFTER_INIT void initialize()
{
auto boot_determined = kernel_command_line().pci_access_level();
switch (detect_optimal_access_type(boot_determined)) {
case PCIAccessLevel::MappingPerDevice:
WindowedMMIOAccess::initialize(ACPI::Parser::the()->find_table("MCFG"));
break;
case PCIAccessLevel::MappingPerBus:
MMIOAccess::initialize(ACPI::Parser::the()->find_table("MCFG"));
break;
case PCIAccessLevel::IOAddressing:
IOAccess::initialize();
break;
default:
VERIFY_NOT_REACHED();
}
PCI::enumerate([&](const Address& address, ID id) {
dmesgln("{} {}", address, id);
});
}
UNMAP_AFTER_INIT bool test_pci_io()
{
dmesgln("Testing PCI via manual probing...");
u32 tmp = 0x80000000;
IO::out32(PCI_ADDRESS_PORT, tmp);
tmp = IO::in32(PCI_ADDRESS_PORT);
if (tmp == 0x80000000) {
dmesgln("PCI IO supported");
return true;
}
dmesgln("PCI IO not supported");
return false;
}
}
}
|