/* * Copyright (c) 2021, Liav A. * * SPDX-License-Identifier: BSD-2-Clause */ #pragma once #include #include #include #include #include #include #include #include #include #include #include #include #include #include namespace Kernel { class AsyncBlockDeviceRequest; class AHCIController; class AHCIPort; class AHCIPortHandler final : public RefCounted , public IRQHandler { friend class AHCIController; friend class SATADiskDevice; public: UNMAP_AFTER_INIT static NonnullRefPtr create(AHCIController&, u8 irq, AHCI::MaskedBitField taken_ports); virtual ~AHCIPortHandler() override; RefPtr device_at_port(size_t port_index) const; virtual const char* purpose() const override { return "SATA Port Handler"; } AHCI::HBADefinedCapabilities hba_capabilities() const; NonnullRefPtr hba_controller() const { return m_parent_controller; } PhysicalAddress get_identify_metadata_physical_region(u32 port_index) const; bool is_responsible_for_port_index(u32 port_index) const { return m_taken_ports.is_set_at(port_index); } private: UNMAP_AFTER_INIT AHCIPortHandler(AHCIController&, u8 irq, AHCI::MaskedBitField taken_ports); //^ IRQHandler virtual bool handle_irq(const RegisterState&) override; enum class Direction : u8 { Read, Write, }; AHCI::MaskedBitField create_pending_ports_interrupts_bitfield() const; void start_request(AsyncBlockDeviceRequest&, bool, bool, u16); void complete_current_request(AsyncDeviceRequest::RequestResult); void enumerate_ports(Function callback) const; RefPtr port_at_index(u32 port_index) const; // Data members HashMap> m_handled_ports; NonnullRefPtr m_parent_controller; NonnullRefPtrVector m_identify_metadata_pages; AHCI::MaskedBitField m_taken_ports; AHCI::MaskedBitField m_pending_ports_interrupts; }; }