From f62c646c28e6b82509a026bb07f12eacc3e6c551 Mon Sep 17 00:00:00 2001 From: Andrew Kaster Date: Wed, 17 May 2023 23:18:03 -0600 Subject: Kernel: Update reset value and register names of SCTLR_EL1 per Arm ARM Referencing ARM DDI 0487J.a, update the names of previously reserved fields, and set the reset_value() of the SCTLR_EL1 struct to reflect the defaults we want for this register on reboot. --- Kernel/Arch/aarch64/Registers.h | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) (limited to 'Kernel') diff --git a/Kernel/Arch/aarch64/Registers.h b/Kernel/Arch/aarch64/Registers.h index 5ca4e626ce..782c768db4 100644 --- a/Kernel/Arch/aarch64/Registers.h +++ b/Kernel/Arch/aarch64/Registers.h @@ -626,12 +626,12 @@ struct alignas(u64) SCTLR_EL1 { int SA : 1; int SA0 : 1; int CP15BEN : 1; - int _reserved6 : 1 = 0; + int nAA : 1; int ITD : 1; int SED : 1; int UMA : 1; - int _reserved10 : 1 = 0; - int _reserved11 : 1 = 1; + int EnRCTX : 1; + int EOS : 1; int I : 1; int EnDB : 1; int DZE : 1; @@ -640,9 +640,9 @@ struct alignas(u64) SCTLR_EL1 { int _reserved17 : 1 = 0; int nTWE : 1; int WXN : 1; - int _reserved20 : 1 = 1; + int TSCXT : 1; int IESB : 1; - int _reserved22 : 1 = 1; + int EIS : 1; int SPAN : 1; int E0E : 1; int EE : 1; @@ -688,10 +688,17 @@ struct alignas(u64) SCTLR_EL1 { static constexpr SCTLR_EL1 reset_value() { SCTLR_EL1 system_control_register_el1 = {}; + system_control_register_el1.SA = 1; + system_control_register_el1.SA0 = 1; + system_control_register_el1.ITD = 1; + system_control_register_el1.SED = 1; + system_control_register_el1.EOS = 1; + system_control_register_el1.TSCXT = 1; + system_control_register_el1.IESB = 1; + system_control_register_el1.EIS = 1; + system_control_register_el1.SPAN = 1; system_control_register_el1.LSMAOE = 1; system_control_register_el1.nTLSMD = 1; - system_control_register_el1.SPAN = 1; - system_control_register_el1.IESB = 1; return system_control_register_el1; } }; -- cgit v1.2.3