From c9a5253ac28a22ff92f59f5a55adabe99b93e5de Mon Sep 17 00:00:00 2001 From: Andreas Kling Date: Wed, 25 Dec 2019 02:56:18 +0100 Subject: Kernel: Uh, actually *actually* turn on CR4.PGE I'm not sure how I managed to misread the location of this bit twice. But I did! Here is finally the correct value, according to Intel: "Page Global Enable (bit 7 of CR4)" Jeez! :^) --- Kernel/VM/MemoryManager.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Kernel/VM') diff --git a/Kernel/VM/MemoryManager.cpp b/Kernel/VM/MemoryManager.cpp index 0ebe60bfea..e7fd16ef46 100644 --- a/Kernel/VM/MemoryManager.cpp +++ b/Kernel/VM/MemoryManager.cpp @@ -168,7 +168,7 @@ void MemoryManager::initialize_paging() // Turn on CR4.PGE so the CPU will respect the G bit in page tables. asm volatile( "mov %cr4, %eax\n" - "orl $0x40, %eax\n" + "orl $0x80, %eax\n" "mov %eax, %cr4\n"); asm volatile("movl %%eax, %%cr3" ::"a"(kernel_page_directory().cr3())); -- cgit v1.2.3