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This patch introduces the concept of shadow bits. For every byte of
memory there is a corresponding shadow byte that contains metadata
about that memory.
Initially, the only metadata is whether the byte has been initialized
or not. That's represented by the least significant shadow bit.
Shadow bits travel together with regular values throughout the entire
CPU and MMU emulation. There are two main helper classes to facilitate
this: ValueWithShadow and ValueAndShadowReference.
ValueWithShadow<T> is basically a struct { T value; T shadow; } whereas
ValueAndShadowReference<T> is struct { T& value; T& shadow; }.
The latter is used as a wrapper around general-purpose registers, since
they can't use the plain ValueWithShadow memory as we need to be able
to address individual 8-bit and 16-bit subregisters (EAX, AX, AL, AH.)
Whenever a computation is made using uninitialized inputs, the result
is tainted and becomes uninitialized as well. This allows us to track
this state as it propagates throughout memory and registers.
This patch doesn't yet keep track of tainted flags, that will be an
important upcoming improvement to this.
I'm sure I've messed up some things here and there, but it seems to
basically work, so we have a place to start! :^)
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We can just check if the first opcode byte is 0x0f to know this.
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The a32 bit tells us whether a memory address is 32-bit or not.
We already have this information in Instruction, so just plumb that
around instead of double-caching the bit.
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We can shrink and simplify Instruction a bit by combining these into
a single "extra bytes" count.
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We can fetch the handler via Instruction::m_descriptor.
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Use some template hacks to force GCC to inline more of the instruction
decoding stuff into the UserspaceEmulator main execution loop.
This is my last optimization for today, and we've gone from ~60 seconds
when running "UserspaceEmulator UserspaceEmulator id" to ~8 seconds :^)
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Instead, just do this once at startup. :^)
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These functions really benefit from being inlined together instead
of being separated.
This yields roughly a ~2x speedup.
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Since this code is performance-sensitive, let's have the compiler do
whatever it can to help us with the most important files.
This yields a ~8% speedup.
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This piggybacks nicely on Instruction's ModR/M resolution code. :^)
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And they're all generic, which will make it easy to support more ops.
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Hopefully this will be flexible enough for our SoftCPU. :^)
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Instead of having a dedicated enum value for the empty state.
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This patch adds a PartAddressableRegister type, which divides a 32-bit
value into separate parts needed for the EAX/AX/AL/AH register splits.
Clean up the code around register access to make it a little less
cumbersome to use.
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This abstract class has a pure virtual member function for all of the
X86 instructions. This can be used to implement.. something. :^)
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This makes functrace usable again :^)
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Closes https://github.com/SerenityOS/serenity/issues/2080
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As spotted by @heavyk this was missed in 57b2b96.
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This patch adds a pure virtual X86::SymbolProvider that can be passed
to Instruction::to_string(). If the instruction contains what appears
to be a program address, stringification will try to symbolicate that
address via the SymbolProvider.
This makes it possible (and very flexible) to add symbolication to
clients of the disassembler. :^)
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I was looking at Kernel::get_good_random_bytes() and wondering where
the RDRAND instruction was. :^)
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For SIB bytes with base but no index, we were emitting two '+' chars
which looked very off.
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While #6 and #7 are not valid segment register, they can still be
encoded in otherwise-valid instructions, so let's tolerate it.
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This might be interesting information later, but I'm not sure how to
encode it at the moment.
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Let's assume a 32-bit execution environment unless otherwise specified.
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This will be very useful for developer tools like ProfileView, and also
for future tools like debuggers and such. :^)
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