Age | Commit message (Collapse) | Author |
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We need to assert if interrupts are not disabled when changing the
interrupt number of an interrupt handler.
Before this fix, any change like this would lead to a crash,
because we are using InterruptDisabler in IRQHandler::change_irq_number.
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There are plenty of places in the kernel that aren't
checking if they actually got their allocation.
This fixes some of them, but definitely not all.
Fixes #3390
Fixes #3391
Also, let's make find_one_free_page() return nullptr
if it doesn't get a free index. This stops the kernel
crashing when out of memory and allows memory purging
to take place again.
Fixes #3487
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An IRQ handler should always be ready to respond to any IRQ.
We must remember that hardware can generate IRQs without any interaction
from our code at all. Ignoring IRQs in such cases is obviously not the
right thing to do.
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MemoryManager cannot use the Singleton class because
MemoryManager::initialize is called before the global constructors
are run. That caused the Singleton to be re-initialized, causing
it to create another MemoryManager instance.
Fixes #3226
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This reverts commit f48feae0b2a300992479abf0b2ded85e45ac6045.
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This reverts commit f0906250a181c831508a45434b9f645ff98f33e4.
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This reverts commit 5a98e329d157a2db8379e0c97c6bdc1328027843.
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Just default the InitFunction template argument.
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Fixes #3226
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AK/HashTable.h is not needed from SpuriousInterruptHandler
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We need to halt the BSP briefly until all APs are ready for the
first context switch, but we can't hold the same spinlock by all
of them while doing so. So, while the APs are waiting on each other
they need to release the scheduler lock, and then once signaled
re-acquire it. Should solve some timing dependent hangs or crashes,
most easily observed using qemu with kvm disabled.
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We can now properly initialize all processors without
crashing by sending SMP IPI messages to synchronize memory
between processors.
We now initialize the APs once we have the scheduler running.
This is so that we can process IPI messages from the other
cores.
Also rework interrupt handling a bit so that it's more of a
1:1 mapping. We need to allocate non-sharable interrupts for
IPIs.
This also fixes the occasional hang/crash because all
CPUs now synchronize memory with each other.
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Moving certain globals into a new Processor structure for
each CPU allows us to eventually run an instance of the
scheduler on each CPU.
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This isn't fully working, the APs pretend like they're
fully initialized and are just halted permanently for now.
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This code needs a closer looking-into at some point. It doesn't seem
entirely safe to be casting u32's to pointers like it does.
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Add a MappedROM::find_chunk_starting_with() helper since that's a very
common usage pattern in clients of this code.
Also convert MultiProcessorParser from a persistent singleton object
to a temporary object constructed via a failable factory function.
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This was supposed to be the foundation for some kind of pre-kernel
environment, but nobody is working on it right now, so let's move
everything back into the kernel and remove all the confusion.
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Supposedly that's how much delay you get when doing I/O on port 0x80.
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I don't see a reason for these to be reference-counted, and removing it
simplifies a bunch of surrounding data structures.
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There was a frequently occurring pattern of "map this physical address
into kernel VM, then read from it, then unmap it again".
This new typed_map() encapsulates that logic by giving you back a
typed pointer to the kind of structure you're interested in accessing.
It returns a TypedMapping<T> that can be used mostly like a pointer.
When destroyed, the TypedMapping object will unmap the memory. :^)
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We return the Optional container in find_redirection_entry_by_vector()
method instead of a raw integer. This makes the code more readable and
correct.
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Instead of blindly setting masks, if we want to disable an IRQ and it's
already masked, we just return. The same happens if we want to enable an
IRQ and it's unmasked.
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Setting the m_enabled variable to true or false can help
with monitoring the IRQHandler object(s) later, and there's no good
reason to have an if-else statement in those methods anyway.
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Before this change, we did a non-specific EOI, which could lead to
problems with other IRQs that are handled in the PIC. Since the original
8259A datasheet permits such functionality and we are not losing any
functionality, this change is acceptable even though we don't experience
problems with the EOI currently.
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Installing an interrupt handler on the syscall IDT vector can lead to
fatal results, so we must assert if that happens.
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Now we don't send raw numbers, but we let the IRQController object to
figure out the correct IRQ number.
This helps in a situation when we have 2 or more IOAPICs, so if IOAPIC
1 is assigned for IRQs 0-23 and IOAPIC 2 is assigned for IRQs 24-47,
if an IRQHandler of IRQ 25 invokes disable() for example, it will call
his responsible IRQController (IOAPIC 2), and the IRQController will
subtract the IRQ number with his assigned offset, and the result is that
the second redirection entry in IOAPIC 2 will be masked.
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We don't return blindly the IRQ controller's model(), if the Spurious
IRQ handler is installed in IOAPIC environment, it's misleading to
return "IOAPIC" string since IOAPIC doesn't really handle Spurious
IRQs, therefore we return a "" string.
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The Spurious Interrupt Handler number that is written to
APIC_REG_SIV is correct now.
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