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2020-07-12UserspaceEmulator: Implement the XCHG instructionAndreas Kling
2020-07-12UserspaceEmulator: Implement some more MOV variantsAndreas Kling
2020-07-12UserspaceEmulator: Implement MOVSB/MOVSW/MOVSDAndreas Kling
2020-07-12UserspaceEmulator: Implement the CMPXCHG instructionAndreas Kling
2020-07-12UserspaceEmulator: Fix broken MOV_RM8_reg8Andreas Kling
2020-07-12UserspaceEmulator: Implement JMP_NEAR_immAndreas Kling
This is a full-width relative jump, when the 8-bit immediate variant isn't large enough.
2020-07-12UserspaceEmulator: Implement the CMOVcc instructionAndreas Kling
2020-07-12UserspaceEmulator: Implement the SBB family of instructionsAndreas Kling
2020-07-12UserspaceEmulator: Add basic TLS (thread-local storage) supportAndreas Kling
The SoftMMU now receives full X86::LogicalAddress values from SoftCPU. This allows the MMU to reroute TLS accesses to a special memory region. The ELF executable's PT_TLS header tells us how to allocate the TLS. Basically, the GS register points to a magical 4-byte area which has a pointer to the TCB (thread control block). The TCB lives in normal flat memory space and is accessed through the DS register.
2020-07-12UserspaceEmulator: Implement the NEG instructionAndreas Kling
Per the Intel manuals, NEG is equivalent to subtracting a value from 0.
2020-07-12UserspaceEmulator: Implement SETcc_RM8Andreas Kling
2020-07-12UserspaceEmulator: Implement the DEC family of instructionsAndreas Kling
2020-07-12UserspaceEmulator: Make sure ELF data segments are zero-initializedAndreas Kling
(And all other memory, too.) This will mutate later when we add shadow memory etc, but for now just zero-initialize it since that's expected by the emulated program.
2020-07-11UserspaceEmulator: Put memory read/write logging behind MEMORY_DEBUGAndreas Kling
2020-07-11UserspaceEmulator: Implement the SHL family of instructionsAndreas Kling
2020-07-11UserspaceEmulator: Implement RET_imm16Andreas Kling
This is just like RET, but it also pops N bytes off the stack.
2020-07-11UserspaceEmulator: Simplify op_foo templatesAndreas Kling
Instead of templatizing both the destination and source types, simply templatize the operand type and sign-extend narrower source values at the call sites instead.
2020-07-11UserspaceEmulator: The generic_RM*_imm8 functions need to sign extendAndreas Kling
We are supposed to sign-extend the 8-bit immediate here, "cmp eax, 0xff" is actually "cmp eax, 0xffffffff"
2020-07-11UserspaceEmulator: Implement MOV_EAX_moff32Andreas Kling
2020-07-11UserspaceEmulator: Implement CALL_RM32Andreas Kling
2020-07-11UserspaceEmulator: Implement the SHR family of instructionsAndreas Kling
2020-07-11UserspaceEmulator: Implement SHR_RM32_imm8Andreas Kling
2020-07-11UserspaceEmulator: Implement the OR family of instructionsAndreas Kling
2020-07-11UserspaceEmulator: Implement PUSH_imm8Andreas Kling
Curiously, the 8-bit immediate is sign-extended.
2020-07-11UserspaceEmulator: Fix broken MOV_RM32_imm32Andreas Kling
Oops, this was incorrectly moving into a GPR rather than the R/M.
2020-07-11UserspaceEmulator: Implement the 32-bit LEAVE instructionAndreas Kling
The 16-bit variant is a bit weird. Let's wait until someone needs it.
2020-07-11UserspaceEmulator: Implement JMP_imm16 and JMP_imm32Andreas Kling
2020-07-11UserspaceEmulator: Implement the MOVZX instructionAndreas Kling
2020-07-11UserspaceEmulator: Implement STOSB/STOSW/STOSDAndreas Kling
...and add a template to handle REP* instruction prefixes. This can be further generalized, but let's go one step at a time.
2020-07-11UserspaceEmulator: Implement some of the IMUL instruction familyAndreas Kling
The single-operand forms of IMUL are a little weird. We can deal with them when they actually show up.
2020-07-11UserspaceEmulator+LibX86: Implement the LEA instructionAndreas Kling
This piggybacks nicely on Instruction's ModR/M resolution code. :^)
2020-07-11UserspaceEmulator: Improve the initial program stack a tiny bitAndreas Kling
Instead of starting with argv=nullptr, envp=nullptr, programs now start with both pointing to a null terminated array (that immediately terminates.) :^)
2020-07-11UserspaceEmulator: Both ADD and SUB modify the carry flagAndreas Kling
2020-07-11UserspaceEmulator: Implement the AND and TEST instructionsAndreas Kling
2020-07-11UserspaceEmulator: Implement the RET instructionAndreas Kling
We can now return from a CALL! :^)
2020-07-11UserspaceEmulator: Symbolicate disassembly output :^)Andreas Kling
Since we have the ELF executable handy, we can actually symbolicate the disassembly trace output really easily. Very cool! :^)
2020-07-11UserspaceEmulator: Don't exit the emulation loop on "RET" :^)Andreas Kling
2020-07-11UserspaceEmulator: Implement PUSH_imm32 and PUSH_RM32Andreas Kling
2020-07-11UserspaceEmulator: Implement short-range jump instructionsAndreas Kling
2020-07-11UserspaceEmulator: Implement the CALL_imm32 instructionAndreas Kling
2020-07-11UserspaceEmulator: Fix broken inline assembly for asymmetric op_foosAndreas Kling
When the Destination and Source of an op_foo were types of different sizes, the generated assembly was not filling up the "source" register fully in some cases. This led to incorrect results.
2020-07-11UserspaceEmulator: Print out the current EIP as we execute instructionsAndreas Kling
2020-07-11UserspaceEmulator: Load the target executable ELF semi-properly :^)Andreas Kling
This patch adds a basic ELF program loader to the UserspaceEmulator and creates MMU regions for each PT_LOAD header. (Note that we don't yet respect the R/W/X flags etc.) We also turn the SoftCPU into an X86::InstructionStream and give it an EIP register so we can actually execute code by fetching memory through our MMU abstraction.
2020-07-11UserspaceEmulator: Set up a very basic program entry stackAndreas Kling
2020-07-11UserspaceEmulator: Convert the XOR instruction to inline assemblyAndreas Kling
2020-07-11UserspaceEmulator: Convert the SUB instruction to inline assemblyAndreas Kling
2020-07-11UserspaceEmulator: Tweak INC and SAR helpers to not be SoftCPU membersAndreas Kling
It's quite nice having these as compartmentalized free functions.
2020-07-11UserspaceEmulator: Add the INC and ADD instructionsAndreas Kling
More inline assembly. I'm still figuring out how to combine templates and inline assembly, but it's turning out pretty cool. :^)
2020-07-11UserspaceEmulator: Give SoftCPU an API for evaluating jump conditionsAndreas Kling
There are 16 conditions and they're all based on a combination of the CPU flags.
2020-07-11UserspaceEmulator: Split SAR inline assembly into 8/16/32 bit variantsAndreas Kling
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