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-rw-r--r--Kernel/Graphics/GraphicsManagement.cpp3
-rw-r--r--Kernel/Graphics/Intel/NativeDisplayConnector.cpp16
2 files changed, 10 insertions, 9 deletions
diff --git a/Kernel/Graphics/GraphicsManagement.cpp b/Kernel/Graphics/GraphicsManagement.cpp
index 025a3370f8..4411ec4563 100644
--- a/Kernel/Graphics/GraphicsManagement.cpp
+++ b/Kernel/Graphics/GraphicsManagement.cpp
@@ -5,6 +5,7 @@
*/
#include <AK/Singleton.h>
+#include <Kernel/Arch/Delay.h>
#include <Kernel/Arch/x86/IO.h>
#include <Kernel/Bus/PCI/API.h>
#include <Kernel/Bus/PCI/IDs.h>
@@ -46,7 +47,7 @@ void GraphicsManagement::disable_vga_emulation_access_permanently()
IO::out8(0x3c4, 1);
u8 sr1 = IO::in8(0x3c5);
IO::out8(0x3c5, sr1 | 1 << 5);
- IO::delay(1000);
+ microseconds_delay(1000);
m_vga_access_is_disabled = true;
}
diff --git a/Kernel/Graphics/Intel/NativeDisplayConnector.cpp b/Kernel/Graphics/Intel/NativeDisplayConnector.cpp
index b0710b3ea9..4ce94adf0c 100644
--- a/Kernel/Graphics/Intel/NativeDisplayConnector.cpp
+++ b/Kernel/Graphics/Intel/NativeDisplayConnector.cpp
@@ -4,7 +4,7 @@
* SPDX-License-Identifier: BSD-2-Clause
*/
-#include <Kernel/Arch/x86/IO.h>
+#include <Kernel/Arch/Delay.h>
#include <Kernel/Bus/PCI/API.h>
#include <Kernel/Debug.h>
#include <Kernel/Devices/DeviceManagement.h>
@@ -371,7 +371,7 @@ bool IntelNativeDisplayConnector::gmbus_wait_for(IntelGraphics::GMBusStatus desi
default:
VERIFY_NOT_REACHED();
}
- IO::delay(1000);
+ microseconds_delay(1000);
milliseconds_passed++;
}
}
@@ -544,7 +544,7 @@ void IntelNativeDisplayConnector::set_display_timings(Graphics::Modesetting cons
dbgln_if(INTEL_GRAPHICS_DEBUG, "sourceSize - {}, {}", (modesetting.vertical.active - 1), (modesetting.horizontal.active - 1));
write_to_register(IntelGraphics::RegisterIndex::PipeASource, (modesetting.vertical.active - 1) | (modesetting.horizontal.active - 1) << 16);
- IO::delay(200);
+ microseconds_delay(200);
}
bool IntelNativeDisplayConnector::wait_for_enabled_pipe_a(size_t milliseconds_timeout) const
@@ -553,7 +553,7 @@ bool IntelNativeDisplayConnector::wait_for_enabled_pipe_a(size_t milliseconds_ti
while (current_time < milliseconds_timeout) {
if (pipe_a_enabled())
return true;
- IO::delay(1000);
+ microseconds_delay(1000);
current_time++;
}
return false;
@@ -564,7 +564,7 @@ bool IntelNativeDisplayConnector::wait_for_disabled_pipe_a(size_t milliseconds_t
while (current_time < milliseconds_timeout) {
if (!pipe_a_enabled())
return true;
- IO::delay(1000);
+ microseconds_delay(1000);
current_time++;
}
return false;
@@ -576,7 +576,7 @@ bool IntelNativeDisplayConnector::wait_for_disabled_pipe_b(size_t milliseconds_t
while (current_time < milliseconds_timeout) {
if (!pipe_b_enabled())
return true;
- IO::delay(1000);
+ microseconds_delay(1000);
current_time++;
}
return false;
@@ -662,14 +662,14 @@ void IntelNativeDisplayConnector::enable_dpll_without_vga(IntelGraphics::PLLSett
set_dpll_registers(settings);
- IO::delay(200);
+ microseconds_delay(200);
write_to_register(IntelGraphics::RegisterIndex::DPLLControlA, (6 << 9) | (settings.p1) << 16 | (1 << 26) | (1 << 28) | (1 << 31));
write_to_register(IntelGraphics::RegisterIndex::DPLLMultiplierA, (dac_multiplier - 1) | ((dac_multiplier - 1) << 8));
// The specification says we should wait (at least) about 150 microseconds
// after enabling the DPLL to allow the clock to stabilize
- IO::delay(200);
+ microseconds_delay(200);
VERIFY(read_from_register(IntelGraphics::RegisterIndex::DPLLControlA) & (1 << 31));
}