diff options
| -rw-r--r-- | Kernel/CommandLine.cpp | 5 | ||||
| -rw-r--r-- | Kernel/CommandLine.h | 1 | ||||
| -rw-r--r-- | Kernel/Storage/AHCIController.cpp | 7 |
3 files changed, 13 insertions, 0 deletions
diff --git a/Kernel/CommandLine.cpp b/Kernel/CommandLine.cpp index 4294b97c9c..f050efbe05 100644 --- a/Kernel/CommandLine.cpp +++ b/Kernel/CommandLine.cpp @@ -113,6 +113,11 @@ UNMAP_AFTER_INIT bool CommandLine::is_mmio_enabled() const return lookup("pci_mmio").value_or("off") == "on"; } +UNMAP_AFTER_INIT bool CommandLine::is_forcing_irq_11_for_ahci() const +{ + return lookup("force_ahci_irq_11").value_or("off") == "on"; +} + UNMAP_AFTER_INIT bool CommandLine::is_legacy_time_enabled() const { return lookup("time").value_or("modern") == "legacy"; diff --git a/Kernel/CommandLine.h b/Kernel/CommandLine.h index 91e553026e..657618700f 100644 --- a/Kernel/CommandLine.h +++ b/Kernel/CommandLine.h @@ -73,6 +73,7 @@ public: [[nodiscard]] bool is_vmmouse_enabled() const; [[nodiscard]] bool is_mmio_enabled() const; [[nodiscard]] bool is_legacy_time_enabled() const; + [[nodiscard]] bool is_forcing_irq_11_for_ahci() const; [[nodiscard]] bool is_text_mode() const; [[nodiscard]] bool is_force_pio() const; [[nodiscard]] AcpiFeatureLevel acpi_feature_level() const; diff --git a/Kernel/Storage/AHCIController.cpp b/Kernel/Storage/AHCIController.cpp index 626e35053d..69c205d2c8 100644 --- a/Kernel/Storage/AHCIController.cpp +++ b/Kernel/Storage/AHCIController.cpp @@ -172,6 +172,13 @@ void AHCIController::initialize() hba().control_regs.ghc = 0x80000000; // Ensure that HBA knows we are AHCI aware. PCI::enable_interrupt_line(pci_address()); PCI::enable_bus_mastering(pci_address()); + + // FIXME: This is a hack for VMWare (and possibly other hardware) that set + // the IRQ line to 7 or other weird value. Find a better way to set this + // with balancing IRQ sharing in mind. + if (kernel_command_line().is_forcing_irq_11_for_ahci()) + PCI::set_interrupt_line(pci_address(), 11); + enable_global_interrupts(); m_handlers.append(AHCIPortHandler::create(*this, PCI::get_interrupt_line(pci_address()), AHCI::MaskedBitField((volatile u32&)(hba().control_regs.pi)))); |