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authorConrad Pankoff <deoxxa@fknsrs.biz>2019-08-12 21:05:14 +1000
committerAndreas Kling <awesomekling@gmail.com>2019-08-12 13:25:59 +0200
commit072bf8cbb9f573288b1f001c4e95357018b50a51 (patch)
treee022219fff65272666e098eed876f9ba5e2f298f /Shell
parent53ddbce0b3dd818468d03325be467d4761a0ea23 (diff)
downloadserenity-072bf8cbb9f573288b1f001c4e95357018b50a51.zip
Kernel: Fix non-DMA writes to IDE drives
Our logic for using the ATA_CMD_CACHE_FLUSH functionality was a bit wrong, and now it's better. The ATA spec says these two things: > The device shall enter the interrupt pending state when: > 1) any command except a PIO data-in command reaches command completion > successfully; > ... > The device shall exit the interrupt pending state when: > 1) the device is selected, BSY is cleared to zero, and the Status > register is read; This means that our sequence of actions was probably never going to work. We were waiting in a loop checking the status register until it left the busy state, _then_ waiting for an interrupt. Unfortunately by checking the status register, we were _clearing_ the interrupt we were about to wait for. Now we just wait for the interrupt - we don't poll the status register at all. This also means that once we get our `wait_for_irq` method sorted out we'll spend a bunch less CPU time waiting for things to complete.
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