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authorPankaj Raghav <pankydev8@gmail.com>2022-01-06 22:01:05 +0530
committerAndreas Kling <kling@serenityos.org>2022-01-09 00:45:38 +0100
commit0a1b34c753e83632688e925a7971ab5d08ffa605 (patch)
tree69377177de15bf03f19b56c87de61ad1fc2634a3 /Kernel/Storage
parent59da9bd0bdf249108cb9628cb417a117c14f7e71 (diff)
downloadserenity-0a1b34c753e83632688e925a7971ab5d08ffa605.zip
Kernel: Use DMA helper everywhere
Port UCHI, AC97, SB16, BMIDEChannel and AHCIPort to use the helper to allocate DMA buffers.
Diffstat (limited to 'Kernel/Storage')
-rw-r--r--Kernel/Storage/ATA/AHCIPort.cpp12
-rw-r--r--Kernel/Storage/ATA/BMIDEChannel.cpp8
2 files changed, 8 insertions, 12 deletions
diff --git a/Kernel/Storage/ATA/AHCIPort.cpp b/Kernel/Storage/ATA/AHCIPort.cpp
index b84c39317f..ef8f426351 100644
--- a/Kernel/Storage/ATA/AHCIPort.cpp
+++ b/Kernel/Storage/ATA/AHCIPort.cpp
@@ -37,14 +37,10 @@ AHCIPort::AHCIPort(const AHCIPortHandler& handler, volatile AHCI::PortRegisters&
return;
}
- m_command_list_page = MM.allocate_supervisor_physical_page();
m_fis_receive_page = MM.allocate_supervisor_physical_page();
- if (m_command_list_page.is_null() || m_fis_receive_page.is_null())
+ if (m_fis_receive_page.is_null())
return;
- dbgln_if(AHCI_DEBUG, "AHCI Port {}: Command list page at {}", representative_port_index(), m_command_list_page->paddr());
- dbgln_if(AHCI_DEBUG, "AHCI Port {}: FIS receive page at {}", representative_port_index(), m_command_list_page->paddr());
-
for (size_t index = 0; index < 1; index++) {
m_dma_buffers.append(MM.allocate_supervisor_physical_page().release_nonnull());
}
@@ -52,7 +48,11 @@ AHCIPort::AHCIPort(const AHCIPortHandler& handler, volatile AHCI::PortRegisters&
m_command_table_pages.append(MM.allocate_supervisor_physical_page().release_nonnull());
}
- auto region_or_error = MM.allocate_kernel_region(m_command_list_page->paddr(), PAGE_SIZE, "AHCI Port Command List", Memory::Region::Access::ReadWrite, Memory::Region::Cacheable::No);
+ auto region_or_error = MM.allocate_dma_buffer_page("AHCI Port Command List", Memory::Region::Access::ReadWrite, m_command_list_page);
+
+ dbgln_if(AHCI_DEBUG, "AHCI Port {}: Command list page at {}", representative_port_index(), m_command_list_page->paddr());
+ dbgln_if(AHCI_DEBUG, "AHCI Port {}: FIS receive page at {}", representative_port_index(), m_fis_receive_page->paddr());
+
if (region_or_error.is_error())
TODO();
m_command_list_region = region_or_error.release_value();
diff --git a/Kernel/Storage/ATA/BMIDEChannel.cpp b/Kernel/Storage/ATA/BMIDEChannel.cpp
index 8acf1dce5d..0dd43ca45e 100644
--- a/Kernel/Storage/ATA/BMIDEChannel.cpp
+++ b/Kernel/Storage/ATA/BMIDEChannel.cpp
@@ -40,18 +40,14 @@ UNMAP_AFTER_INIT void BMIDEChannel::initialize()
VERIFY(m_io_group.bus_master_base().has_value());
// Let's try to set up DMA transfers.
PCI::enable_bus_mastering(m_parent_controller->pci_address());
- m_prdt_page = MM.allocate_supervisor_physical_page();
- m_dma_buffer_page = MM.allocate_supervisor_physical_page();
- if (m_dma_buffer_page.is_null() || m_prdt_page.is_null())
- return;
{
- auto region_or_error = MM.allocate_kernel_region(m_prdt_page->paddr(), PAGE_SIZE, "IDE PRDT", Memory::Region::Access::ReadWrite);
+ auto region_or_error = MM.allocate_dma_buffer_page("IDE PRDT", Memory::Region::Access::ReadWrite, m_prdt_page);
if (region_or_error.is_error())
TODO();
m_prdt_region = region_or_error.release_value();
}
{
- auto region_or_error = MM.allocate_kernel_region(m_dma_buffer_page->paddr(), PAGE_SIZE, "IDE DMA region", Memory::Region::Access::ReadWrite);
+ auto region_or_error = MM.allocate_dma_buffer_page("IDE DMA region", Memory::Region::Access::ReadWrite, m_dma_buffer_page);
if (region_or_error.is_error())
TODO();
m_dma_buffer_region = region_or_error.release_value();