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author | Liav A <liavalb@gmail.com> | 2021-09-23 10:50:45 +0300 |
---|---|---|
committer | Andreas Kling <kling@serenityos.org> | 2021-09-29 11:24:33 +0200 |
commit | a411a44fda3ba713e139331d4c29ea32f70c99d8 (patch) | |
tree | 8f17520fc4f614a622cd2a30b591db9beff61ae6 /Kernel/Storage/IDEController.cpp | |
parent | 057f5a12c2c69b1bad1d8b778d3cb934b3a8f346 (diff) | |
download | serenity-a411a44fda3ba713e139331d4c29ea32f70c99d8.zip |
Kernel/PCI: Cache interrupt line and interrupt pin of a device
This allows us to remove the PCI::get_interrupt_line API function. As a
result, this removes a bunch of not so great patterns that we used to
cache PCI interrupt line in many IRQHandler derived classes instead of
just using interrupt_number method of IRQHandler class.
Diffstat (limited to 'Kernel/Storage/IDEController.cpp')
-rw-r--r-- | Kernel/Storage/IDEController.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/Kernel/Storage/IDEController.cpp b/Kernel/Storage/IDEController.cpp index f28e14461b..49c9188299 100644 --- a/Kernel/Storage/IDEController.cpp +++ b/Kernel/Storage/IDEController.cpp @@ -55,6 +55,7 @@ UNMAP_AFTER_INIT IDEController::IDEController(PCI::DeviceIdentifier const& devic : StorageController() , PCI::Device(device_identifier.address()) , m_prog_if(device_identifier.prog_if()) + , m_interrupt_line(device_identifier.interrupt_line()) { PCI::enable_io_space(device_identifier.address()); PCI::enable_memory_space(device_identifier.address()); @@ -114,7 +115,7 @@ UNMAP_AFTER_INIT void IDEController::initialize(bool force_pio) { auto bus_master_base = IOAddress(PCI::get_BAR4(pci_address()) & (~1)); dbgln("IDE controller @ {}: bus master base was set to {}", pci_address(), bus_master_base); - dbgln("IDE controller @ {}: interrupt line was set to {}", pci_address(), PCI::get_interrupt_line(pci_address())); + dbgln("IDE controller @ {}: interrupt line was set to {}", pci_address(), m_interrupt_line.value()); dbgln("IDE controller @ {}: {}", pci_address(), detect_controller_type(m_prog_if.value())); dbgln("IDE controller @ {}: primary channel DMA capable? {}", pci_address(), ((bus_master_base.offset(2).in<u8>() >> 5) & 0b11)); dbgln("IDE controller @ {}: secondary channel DMA capable? {}", pci_address(), ((bus_master_base.offset(2 + 8).in<u8>() >> 5) & 0b11)); @@ -131,7 +132,7 @@ UNMAP_AFTER_INIT void IDEController::initialize(bool force_pio) auto bar3 = PCI::get_BAR3(pci_address()); auto secondary_control_io = (bar3 == 0x1 || bar3 == 0) ? IOAddress(0x376) : IOAddress(bar3 & (~1)); - auto irq_line = PCI::get_interrupt_line(pci_address()); + auto irq_line = m_interrupt_line.value(); if (is_pci_native_mode_enabled()) { VERIFY(irq_line != 0); } |