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authorLiav A <liavalb@gmail.com>2021-12-23 17:51:11 +0200
committerBrian Gianforcaro <b.gianfo@gmail.com>2021-12-23 23:18:58 -0800
commit52e01b46ebe39efa2906b9a03102091910ab31dd (patch)
tree85072a98f100affe0f15d6148b35b92b7622de4f /Kernel/Firmware/MultiProcessor
parent682f89d5bc1fbc28260ccf98f4ebc7798a5cd46c (diff)
downloadserenity-52e01b46ebe39efa2906b9a03102091910ab31dd.zip
Kernel: Move Multi Processor Parser code to a separate directory
Diffstat (limited to 'Kernel/Firmware/MultiProcessor')
-rw-r--r--Kernel/Firmware/MultiProcessor/Parser.cpp157
-rw-r--r--Kernel/Firmware/MultiProcessor/Parser.h171
2 files changed, 328 insertions, 0 deletions
diff --git a/Kernel/Firmware/MultiProcessor/Parser.cpp b/Kernel/Firmware/MultiProcessor/Parser.cpp
new file mode 100644
index 0000000000..a7866e8261
--- /dev/null
+++ b/Kernel/Firmware/MultiProcessor/Parser.cpp
@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
+ * Copyright (c) 2020, Andreas Kling <kling@serenityos.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <AK/StringView.h>
+#include <Kernel/Debug.h>
+#include <Kernel/Firmware/BIOS.h>
+#include <Kernel/Firmware/MultiProcessor/Parser.h>
+#include <Kernel/Interrupts/IOAPIC.h>
+#include <Kernel/Memory/TypedMapping.h>
+#include <Kernel/Sections.h>
+#include <Kernel/StdLib.h>
+
+namespace Kernel {
+
+UNMAP_AFTER_INIT OwnPtr<MultiProcessorParser> MultiProcessorParser::autodetect()
+{
+ auto floating_pointer = find_floating_pointer();
+ if (!floating_pointer.has_value())
+ return {};
+ auto parser = adopt_own_if_nonnull(new (nothrow) MultiProcessorParser(floating_pointer.value()));
+ VERIFY(parser != nullptr);
+ return parser;
+}
+
+UNMAP_AFTER_INIT MultiProcessorParser::MultiProcessorParser(PhysicalAddress floating_pointer)
+ : m_floating_pointer(floating_pointer)
+{
+ dbgln("MultiProcessor: Floating Pointer Structure @ {}", m_floating_pointer);
+ parse_floating_pointer_data();
+ parse_configuration_table();
+}
+
+UNMAP_AFTER_INIT void MultiProcessorParser::parse_floating_pointer_data()
+{
+ auto floating_pointer = Memory::map_typed<MultiProcessor::FloatingPointer>(m_floating_pointer);
+ m_configuration_table = PhysicalAddress(floating_pointer->physical_address_ptr);
+ dbgln("Features {}, IMCR? {}", floating_pointer->feature_info[0], (floating_pointer->feature_info[0] & (1 << 7)));
+}
+
+UNMAP_AFTER_INIT void MultiProcessorParser::parse_configuration_table()
+{
+ auto configuration_table_length = Memory::map_typed<MultiProcessor::ConfigurationTableHeader>(m_configuration_table)->length;
+ auto config_table = Memory::map_typed<MultiProcessor::ConfigurationTableHeader>(m_configuration_table, configuration_table_length);
+
+ size_t entry_count = config_table->entry_count;
+ auto* entry = config_table->entries;
+ while (entry_count > 0) {
+ dbgln_if(MULTIPROCESSOR_DEBUG, "MultiProcessor: Entry Type {} detected.", entry->entry_type);
+ switch (entry->entry_type) {
+ case ((u8)MultiProcessor::ConfigurationTableEntryType::Processor):
+ entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::ProcessorEntry);
+ break;
+ case ((u8)MultiProcessor::ConfigurationTableEntryType::Bus):
+ m_bus_entries.append(*(const MultiProcessor::BusEntry*)entry);
+ entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::BusEntry);
+ break;
+ case ((u8)MultiProcessor::ConfigurationTableEntryType::IOAPIC):
+ entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::IOAPICEntry);
+ break;
+ case ((u8)MultiProcessor::ConfigurationTableEntryType::IO_Interrupt_Assignment):
+ m_io_interrupt_assignment_entries.append(*(const MultiProcessor::IOInterruptAssignmentEntry*)entry);
+ entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::IOInterruptAssignmentEntry);
+ break;
+ case ((u8)MultiProcessor::ConfigurationTableEntryType::Local_Interrupt_Assignment):
+ entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::LocalInterruptAssignmentEntry);
+ break;
+ case ((u8)MultiProcessor::ConfigurationTableEntryType::SystemAddressSpaceMapping):
+ entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::SystemAddressSpaceMappingEntry);
+ break;
+ case ((u8)MultiProcessor::ConfigurationTableEntryType::BusHierarchyDescriptor):
+ entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::BusHierarchyDescriptorEntry);
+ break;
+ case ((u8)MultiProcessor::ConfigurationTableEntryType::CompatibilityBusAddressSpaceModifier):
+ entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::CompatibilityBusAddressSpaceModifierEntry);
+ break;
+ default:
+ VERIFY_NOT_REACHED();
+ }
+ --entry_count;
+ }
+}
+
+UNMAP_AFTER_INIT Optional<PhysicalAddress> MultiProcessorParser::find_floating_pointer()
+{
+ StringView signature("_MP_");
+ auto mp_floating_pointer = map_ebda().find_chunk_starting_with(signature, 16);
+ if (mp_floating_pointer.has_value())
+ return mp_floating_pointer;
+ return map_bios().find_chunk_starting_with(signature, 16);
+}
+
+UNMAP_AFTER_INIT Vector<u8> MultiProcessorParser::get_pci_bus_ids() const
+{
+ Vector<u8> pci_bus_ids;
+ for (auto& entry : m_bus_entries) {
+ if (!strncmp("PCI ", entry.bus_type, strlen("PCI ")))
+ pci_bus_ids.append(entry.bus_id);
+ }
+ return pci_bus_ids;
+}
+
+UNMAP_AFTER_INIT Vector<PCIInterruptOverrideMetadata> MultiProcessorParser::get_pci_interrupt_redirections()
+{
+ dbgln("MultiProcessor: Get PCI IOAPIC redirections");
+ Vector<PCIInterruptOverrideMetadata> overrides;
+ auto pci_bus_ids = get_pci_bus_ids();
+ for (auto& entry : m_io_interrupt_assignment_entries) {
+ for (auto id : pci_bus_ids) {
+ if (id == entry.source_bus_id) {
+
+ dbgln("Interrupts: Bus {}, polarity {}, trigger mode {}, INT {}, IOAPIC {}, IOAPIC INTIN {}",
+ entry.source_bus_id,
+ entry.polarity,
+ entry.trigger_mode,
+ entry.source_bus_irq,
+ entry.destination_ioapic_id,
+ entry.destination_ioapic_intin_pin);
+ overrides.empend(
+ entry.source_bus_id,
+ entry.polarity,
+ entry.trigger_mode,
+ entry.source_bus_irq,
+ entry.destination_ioapic_id,
+ entry.destination_ioapic_intin_pin);
+ }
+ }
+ }
+
+ for (auto& override_metadata : overrides) {
+ dbgln("Interrupts: Bus {}, polarity {}, PCI device {}, trigger mode {}, INT {}, IOAPIC {}, IOAPIC INTIN {}",
+ override_metadata.bus(),
+ override_metadata.polarity(),
+ override_metadata.pci_device_number(),
+ override_metadata.trigger_mode(),
+ override_metadata.pci_interrupt_pin(),
+ override_metadata.ioapic_id(),
+ override_metadata.ioapic_interrupt_pin());
+ }
+ return overrides;
+}
+
+UNMAP_AFTER_INIT PCIInterruptOverrideMetadata::PCIInterruptOverrideMetadata(u8 bus_id, u8 polarity, u8 trigger_mode, u8 source_irq, u32 ioapic_id, u16 ioapic_int_pin)
+ : m_bus_id(bus_id)
+ , m_polarity(polarity)
+ , m_trigger_mode(trigger_mode)
+ , m_pci_interrupt_pin(source_irq & 0b11)
+ , m_pci_device_number((source_irq >> 2) & 0b11111)
+ , m_ioapic_id(ioapic_id)
+ , m_ioapic_interrupt_pin(ioapic_int_pin)
+{
+}
+
+}
diff --git a/Kernel/Firmware/MultiProcessor/Parser.h b/Kernel/Firmware/MultiProcessor/Parser.h
new file mode 100644
index 0000000000..26094c8ab4
--- /dev/null
+++ b/Kernel/Firmware/MultiProcessor/Parser.h
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#pragma once
+
+#include <AK/Types.h>
+#include <AK/Vector.h>
+#include <Kernel/Memory/Region.h>
+#include <Kernel/PhysicalAddress.h>
+#include <Kernel/VirtualAddress.h>
+
+namespace Kernel {
+namespace MultiProcessor {
+
+struct [[gnu::packed]] FloatingPointer {
+ char sig[4];
+ u32 physical_address_ptr;
+ u8 length;
+ u8 specification_revision;
+ u8 checksum;
+ u8 feature_info[5];
+};
+
+struct [[gnu::packed]] EntryHeader {
+ u8 entry_type;
+};
+
+struct [[gnu::packed]] ConfigurationTableHeader {
+ char sig[4];
+ u16 length;
+ u8 specification_revision;
+ u8 checksum;
+ char oem_id[8];
+ char product_id[12];
+ u32 oem_table_ptr;
+ u16 oem_table_size;
+ u16 entry_count;
+ u32 local_apic_address;
+ u16 ext_table_length;
+ u8 ext_table_checksum;
+ u8 reserved;
+ EntryHeader entries[];
+};
+
+enum class ConfigurationTableEntryType {
+ Processor = 0,
+ Bus = 1,
+ IOAPIC = 2,
+ IO_Interrupt_Assignment = 3,
+ Local_Interrupt_Assignment = 4,
+ SystemAddressSpaceMapping = 128,
+ BusHierarchyDescriptor = 129,
+ CompatibilityBusAddressSpaceModifier = 130
+};
+
+struct [[gnu::packed]] ExtEntryHeader {
+ u8 entry_type;
+ u8 entry_length;
+};
+
+struct [[gnu::packed]] ProcessorEntry {
+ EntryHeader h;
+ u8 local_apic_id;
+ u8 local_apic_version;
+ u8 cpu_flags;
+ u32 cpu_signature;
+ u32 feature_flags;
+ u8 reserved[8];
+};
+
+struct [[gnu::packed]] BusEntry {
+ EntryHeader h;
+ u8 bus_id;
+ char bus_type[6];
+};
+
+struct [[gnu::packed]] IOAPICEntry {
+ EntryHeader h;
+ u8 ioapic_id;
+ u8 ioapic_version;
+ u8 ioapic_flags;
+ u32 ioapic_address;
+};
+
+enum class InterruptType {
+ INT = 0,
+ NMI = 1,
+ SMI = 2,
+ ExtINT = 3,
+};
+
+struct [[gnu::packed]] IOInterruptAssignmentEntry {
+ EntryHeader h;
+ u8 interrupt_type;
+ u8 polarity;
+ u8 trigger_mode;
+ u8 source_bus_id;
+ u8 source_bus_irq;
+ u8 destination_ioapic_id;
+ u8 destination_ioapic_intin_pin;
+};
+
+struct [[gnu::packed]] LocalInterruptAssignmentEntry {
+ EntryHeader h;
+ u8 interrupt_type;
+ u8 polarity;
+ u8 trigger_mode;
+ u8 source_bus_id;
+ u8 source_bus_irq;
+ u8 destination_lapic_id;
+ u8 destination_lapic_lintin_pin;
+};
+
+enum class SystemAddressType {
+ IO = 0,
+ Memory = 1,
+ Prefetch = 2,
+};
+
+struct [[gnu::packed]] SystemAddressSpaceMappingEntry {
+ ExtEntryHeader h;
+ u8 bus_id;
+ u8 address_type;
+ u64 address_base;
+ u64 length;
+};
+
+struct [[gnu::packed]] BusHierarchyDescriptorEntry {
+ ExtEntryHeader h;
+ u8 bus_id;
+ u8 bus_info;
+ u8 parent_bus;
+ u8 reserved[3];
+};
+
+struct [[gnu::packed]] CompatibilityBusAddressSpaceModifierEntry {
+ ExtEntryHeader h;
+ u8 bus_id;
+ u8 address_modifier;
+ u32 predefined_range_list;
+};
+
+}
+
+class PCIInterruptOverrideMetadata;
+
+class MultiProcessorParser final {
+public:
+ static OwnPtr<MultiProcessorParser> autodetect();
+
+ Vector<PCIInterruptOverrideMetadata> get_pci_interrupt_redirections();
+
+private:
+ explicit MultiProcessorParser(PhysicalAddress floating_pointer);
+
+ void parse_configuration_table();
+ void parse_floating_pointer_data();
+
+ Vector<u8> get_pci_bus_ids() const;
+
+ static Optional<PhysicalAddress> find_floating_pointer();
+
+ PhysicalAddress m_floating_pointer;
+ PhysicalAddress m_configuration_table;
+ Vector<MultiProcessor::IOInterruptAssignmentEntry> m_io_interrupt_assignment_entries;
+ Vector<MultiProcessor::BusEntry> m_bus_entries;
+};
+}