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authorLiav A <liavalb@gmail.com>2022-01-15 09:08:58 +0200
committerIdan Horowitz <idan.horowitz@gmail.com>2022-01-19 21:54:41 +0200
commit518473846a0ca84a5f1be8b39b5764207c11c195 (patch)
tree35a5cd6ab6b2433acfd78c0efc480383a3f8c0e5 /Kernel/Bus/PCI
parent0833ae0b3619b8c294bc5bddf152d9c2ac4d92d3 (diff)
downloadserenity-518473846a0ca84a5f1be8b39b5764207c11c195.zip
Kernel/PCI: Start enumeration in specified start bus of the PCI domain
Some devices, like the Intel Volume Management Device, might have bus numbering restrictions (so numbers can be from 224 to 225, for example).
Diffstat (limited to 'Kernel/Bus/PCI')
-rw-r--r--Kernel/Bus/PCI/Controller/HostBridge.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/Kernel/Bus/PCI/Controller/HostBridge.cpp b/Kernel/Bus/PCI/Controller/HostBridge.cpp
index 6d7748619e..0535195cc9 100644
--- a/Kernel/Bus/PCI/Controller/HostBridge.cpp
+++ b/Kernel/Bus/PCI/Controller/HostBridge.cpp
@@ -106,8 +106,8 @@ UNMAP_AFTER_INIT void HostBridge::enumerate_attached_devices(Function<void(Devic
VERIFY(Access::the().scan_lock().is_locked());
// First scan bus 0. Find any device on that bus, and if it's a PCI-to-PCI
// bridge, recursively scan it too.
- m_enumerated_buses.set(0, true);
- enumerate_bus(callback, 0, true);
+ m_enumerated_buses.set(m_domain.start_bus(), true);
+ enumerate_bus(callback, m_domain.start_bus(), true);
// Handle Multiple PCI host bridges on slot 0, device 0.
// If we happen to miss some PCI buses because they are not reachable through