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author | Andreas Kling <kling@serenityos.org> | 2021-08-06 13:49:36 +0200 |
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committer | Andreas Kling <kling@serenityos.org> | 2021-08-06 14:05:58 +0200 |
commit | 93d98d49769de22695f8cb4c96c5ad6f7ac39d83 (patch) | |
tree | 416a0551a39e61ca79b10a07750898f050e220c8 /Kernel/Bus/PCI/MMIOAccess.cpp | |
parent | a1d7ebf85adca1550b5d61c8b7ab7fe95217e0e2 (diff) | |
download | serenity-93d98d49769de22695f8cb4c96c5ad6f7ac39d83.zip |
Kernel: Move Kernel/Memory/ code into Kernel::Memory namespace
Diffstat (limited to 'Kernel/Bus/PCI/MMIOAccess.cpp')
-rw-r--r-- | Kernel/Bus/PCI/MMIOAccess.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/Kernel/Bus/PCI/MMIOAccess.cpp b/Kernel/Bus/PCI/MMIOAccess.cpp index 6811f4df8c..e5475fafda 100644 --- a/Kernel/Bus/PCI/MMIOAccess.cpp +++ b/Kernel/Bus/PCI/MMIOAccess.cpp @@ -57,7 +57,7 @@ UNMAP_AFTER_INIT MMIOAccess::MMIOAccess(PhysicalAddress p_mcfg) { dmesgln("PCI: Using MMIO for PCI configuration space access"); - auto checkup_region = MM.allocate_kernel_region(p_mcfg.page_base(), (PAGE_SIZE * 2), "PCI MCFG Checkup", Region::Access::Read | Region::Access::Write); + auto checkup_region = MM.allocate_kernel_region(p_mcfg.page_base(), (PAGE_SIZE * 2), "PCI MCFG Checkup", Memory::Region::Access::Read | Memory::Region::Access::Write); dbgln_if(PCI_DEBUG, "PCI: Checking MCFG Table length to choose the correct mapping size"); auto* sdt = (ACPI::Structures::SDTHeader*)checkup_region->vaddr().offset(p_mcfg.offset_in_page()).as_ptr(); u32 length = sdt->length; @@ -66,7 +66,7 @@ UNMAP_AFTER_INIT MMIOAccess::MMIOAccess(PhysicalAddress p_mcfg) dbgln("PCI: MCFG, length: {}, revision: {}", length, revision); checkup_region->unmap(); - auto mcfg_region = MM.allocate_kernel_region(p_mcfg.page_base(), page_round_up(length) + PAGE_SIZE, "PCI Parsing MCFG", Region::Access::Read | Region::Access::Write); + auto mcfg_region = MM.allocate_kernel_region(p_mcfg.page_base(), Memory::page_round_up(length) + PAGE_SIZE, "PCI Parsing MCFG", Memory::Region::Access::Read | Memory::Region::Access::Write); auto& mcfg = *(ACPI::Structures::MCFG*)mcfg_region->vaddr().offset(p_mcfg.offset_in_page()).as_ptr(); dbgln_if(PCI_DEBUG, "PCI: Checking MCFG @ {}, {}", VirtualAddress(&mcfg), PhysicalAddress(p_mcfg.get())); @@ -89,7 +89,7 @@ UNMAP_AFTER_INIT MMIOAccess::MMIOAccess(PhysicalAddress p_mcfg) // PCI::PhysicalID objects to the vector, because get_capabilities calls // PCI::read16 which will need this region to be mapped. u8 start_bus = m_segments.get(0).value().get_start_bus(); - m_mapped_region = MM.allocate_kernel_region(determine_memory_mapped_bus_region(0, start_bus), MEMORY_RANGE_PER_BUS, "PCI ECAM", Region::Access::Read | Region::Access::Write); + m_mapped_region = MM.allocate_kernel_region(determine_memory_mapped_bus_region(0, start_bus), MEMORY_RANGE_PER_BUS, "PCI ECAM", Memory::Region::Access::Read | Memory::Region::Access::Write); m_mapped_bus = start_bus; dbgln_if(PCI_DEBUG, "PCI: First PCI ECAM Mapped region for starting bus {} @ {} {}", start_bus, m_mapped_region->vaddr(), m_mapped_region->physical_page(0)->paddr()); @@ -102,7 +102,7 @@ void MMIOAccess::map_bus_region(u32 segment, u8 bus) VERIFY(m_access_lock.is_locked()); if (m_mapped_bus == bus) return; - m_mapped_region = MM.allocate_kernel_region(determine_memory_mapped_bus_region(segment, bus), MEMORY_RANGE_PER_BUS, "PCI ECAM", Region::Access::Read | Region::Access::Write); + m_mapped_region = MM.allocate_kernel_region(determine_memory_mapped_bus_region(segment, bus), MEMORY_RANGE_PER_BUS, "PCI ECAM", Memory::Region::Access::Read | Memory::Region::Access::Write); m_mapped_bus = bus; dbgln_if(PCI_DEBUG, "PCI: New PCI ECAM Mapped region for bus {} @ {} {}", bus, m_mapped_region->vaddr(), m_mapped_region->physical_page(0)->paddr()); } |