diff options
author | Liav A <liavalb@gmail.com> | 2022-01-07 14:10:44 +0200 |
---|---|---|
committer | Andreas Kling <kling@serenityos.org> | 2022-01-08 23:49:26 +0100 |
commit | ac2c01320be494ed550954250df36796dda2f94c (patch) | |
tree | cb7ecd6f0a2a26f6c81e9369c24fb7bd8834c817 /Kernel/Bus/PCI/Access.h | |
parent | 46f6c86362dd66c6dc8bef43cf9e2b7bea50a6cb (diff) | |
download | serenity-ac2c01320be494ed550954250df36796dda2f94c.zip |
Kernel/PCI: Split host bridge code from the Access singleton
Two classes are added - HostBridge and MemoryBackedHostBridge, which
both derive from HostController class. This allows the kernel to map
different busses from different PCI domains in the same time. Each
HostController implementation doesn't take the Address object to address
PCI devices but instead we take distinct numbers of the PCI bus, device
and function as it allows us to specify arbitrary PCI domains in the
Address structure and still to get the correct PCI devices. This also
matches the hardware behavior of PCI domains - the host bridge merely
takes memory operations or IO operations and translates them to
addressing of three components - PCI bus, device and function.
These changes also greatly simplify how enumeration of Host Bridges work
now - scanning of the hardware depends on what the Host bridges can do
for us, so in case we have multiple host bridges that expose a memory
mapped region or IO ports to access PCI configuration space, we simply
let the code of the host bridge to figure out how to fetch data for us.
Another semantical change is that a PCI domain structure is no longer
attached to a PhysicalAddress, so even in the case that the machine
doesn't implement PCI domains, we still treat that machine to contain 1
PCI domain to treat that one host bridge in the same way, like with a
machine with one or more PCI domains.
Diffstat (limited to 'Kernel/Bus/PCI/Access.h')
-rw-r--r-- | Kernel/Bus/PCI/Access.h | 54 |
1 files changed, 12 insertions, 42 deletions
diff --git a/Kernel/Bus/PCI/Access.h b/Kernel/Bus/PCI/Access.h index a546d1ad82..a247572a05 100644 --- a/Kernel/Bus/PCI/Access.h +++ b/Kernel/Bus/PCI/Access.h @@ -8,26 +8,21 @@ #include <AK/Bitmap.h> #include <AK/Vector.h> +#include <Kernel/Bus/PCI/Controller/HostController.h> #include <Kernel/Bus/PCI/Definitions.h> #include <Kernel/FileSystem/SysFS.h> #include <Kernel/Locking/Spinlock.h> namespace Kernel::PCI { +class HostBridge; class Access { public: - enum class AccessType { - IO, - Memory, - }; - - static bool initialize_for_memory_access(PhysicalAddress mcfg_table); - static bool initialize_for_io_access(); + static bool initialize_for_multiple_pci_domains(PhysicalAddress mcfg_table); + static bool initialize_for_one_pci_domain(); void fast_enumerate(Function<void(DeviceIdentifier const&)>&) const; void rescan_hardware(); - void rescan_hardware_with_memory_addressing(); - void rescan_hardware_with_io_addressing(); static Access& the(); static bool is_initialized(); @@ -40,50 +35,25 @@ public: u32 read32_field(Address address, u32 field); DeviceIdentifier get_device_identifier(Address address) const; + Spinlock const& scan_lock() const { return m_scan_lock; } + Mutex const& access_lock() const { return m_access_lock; } + private: u8 read8_field(Address address, RegisterOffset field); u16 read16_field(Address address, RegisterOffset field); - void enumerate_bus(int type, u8 bus, bool recursive); - void enumerate_functions(int type, u8 bus, u8 device, u8 function, bool recursive); - void enumerate_device(int type, u8 bus, u8 device, bool recursive); + void add_host_controller(NonnullOwnPtr<HostController>); + bool find_and_register_pci_host_bridges_from_acpi_mcfg_table(PhysicalAddress mcfg); + Access(); - explicit Access(AccessType); - bool search_pci_domains_from_acpi_mcfg_table(PhysicalAddress mcfg); Vector<Capability> get_capabilities(Address); Optional<u8> get_capabilities_pointer(Address address); - // IO access (legacy) operations - u8 io_read8_field(Address address, u32 field); - u16 io_read16_field(Address address, u32 field); - u32 io_read32_field(Address address, u32 field); - void io_write8_field(Address address, u32, u8); - void io_write16_field(Address address, u32, u16); - void io_write32_field(Address address, u32, u32); - u16 io_read_type(Address address); - - // Memory-mapped access operations - void map_bus_region(u32 domain, u8 bus); - u8 memory_read8_field(Address address, u32 field); - u16 memory_read16_field(Address address, u32 field); - u32 memory_read32_field(Address address, u32 field); - void memory_write8_field(Address address, u32, u8); - void memory_write16_field(Address address, u32, u16); - void memory_write32_field(Address address, u32, u32); - u16 memory_read_type(Address address); - VirtualAddress get_device_configuration_memory_mapped_space(Address address); - Optional<PhysicalAddress> determine_memory_mapped_bus_base_address(u32 domain, u8 bus) const; - - // Data-members for accessing Memory mapped PCI devices' configuration spaces - u8 m_mapped_bus { 0 }; - OwnPtr<Memory::Region> m_mapped_bus_region; - HashMap<u32, PCI::Domain> m_domains; - // General Data-members mutable Mutex m_access_lock; mutable Spinlock m_scan_lock; - Bitmap m_enumerated_buses; - AccessType m_access_type; + + HashMap<u32, NonnullOwnPtr<HostController>> m_host_controllers; Vector<DeviceIdentifier> m_device_identifiers; }; } |