Kernel: Enable SMAP protection on IRQ and exception entry

It would be nice to do this in the assembly code, but we have to check
if the feature is available before doing a CLAC, so I've put this in
the C++ code for now.

2 files changed, 6 insertions, 0 deletions

diff --git a/Kernel/Arch/i386/CPU.cpp b/Kernel/Arch/i386/CPU.cpp
index 01d5cc14d6..6282adfcc7 100644
--- a/Kernel/Arch/i386/CPU.cpp
+++ b/Kernel/Arch/i386/CPU.cpp
@@ -189,18 +189,21 @@ void handle_crash(RegisterDump& regs, const char* description, int signal)
 EH_ENTRY_NO_CODE(6, illegal_instruction);
 void illegal_instruction_handler(RegisterDump regs)
 {
+    clac();
     handle_crash(regs, "Illegal instruction", SIGILL);
 }
 
 EH_ENTRY_NO_CODE(0, divide_error);
 void divide_error_handler(RegisterDump regs)
 {
+    clac();
     handle_crash(regs, "Divide error", SIGFPE);
 }
 
 EH_ENTRY(13, general_protection_fault);
 void general_protection_fault_handler(RegisterDump regs)
 {
+    clac();
     handle_crash(regs, "General protection fault", SIGSEGV);
 }
 
@@ -217,6 +220,7 @@ void fpu_exception_handler(RegisterDump)
 EH_ENTRY(14, page_fault);
 void page_fault_handler(RegisterDump regs)
 {
+    clac();
     ASSERT(current);
 
     u32 fault_address;
@@ -491,6 +495,7 @@ void load_task_register(u16 selector)
 
 void handle_irq(RegisterDump regs)
 {
+    clac();
     ASSERT(regs.isr_number >= 0x50 && regs.isr_number <= 0x5f);
     u8 irq = (u8)(regs.isr_number - 0x50);
     if (s_irq_handler[irq])
diff --git a/Kernel/Arch/i386/PIT.cpp b/Kernel/Arch/i386/PIT.cpp
index 133af20ee7..6f2c5c61d1 100644
--- a/Kernel/Arch/i386/PIT.cpp
+++ b/Kernel/Arch/i386/PIT.cpp
@@ -38,6 +38,7 @@ static u32 s_seconds_since_boot;
 
 void timer_interrupt_handler(RegisterDump regs)
 {
+    clac();
     IRQHandlerScope scope(IRQ_TIMER);
     if (++s_ticks_this_second >= TICKS_PER_SECOND) {
         // FIXME: Synchronize with the RTC somehow to prevent drifting apart.