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authorJames Mintram <me@jamesrm.com>2022-04-03 21:42:10 +0100
committerLinus Groh <mail@linusgroh.de>2022-04-06 08:56:20 +0100
commitd94c7fa417f4fff749ffea5f6fbaa30a145fac88 (patch)
treed4f5b19f4138ba4e5fce0393abd667ce16a222e7 /Kernel/Arch/aarch64/RPi/GPIO.h
parentb884c5746d09efc333bb1848cdd46c597f857138 (diff)
downloadserenity-d94c7fa417f4fff749ffea5f6fbaa30a145fac88.zip
Kernel: Improve the aarch64 kernel source files disk layout
Diffstat (limited to 'Kernel/Arch/aarch64/RPi/GPIO.h')
-rw-r--r--Kernel/Arch/aarch64/RPi/GPIO.h60
1 files changed, 60 insertions, 0 deletions
diff --git a/Kernel/Arch/aarch64/RPi/GPIO.h b/Kernel/Arch/aarch64/RPi/GPIO.h
new file mode 100644
index 0000000000..4f38f9c376
--- /dev/null
+++ b/Kernel/Arch/aarch64/RPi/GPIO.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2021, Nico Weber <thakis@chromium.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#pragma once
+
+#include <AK/Array.h>
+#include <AK/Types.h>
+
+namespace Prekernel {
+
+struct GPIOControlRegisters;
+
+// Can configure the general-purpose I/O registers on a Raspberry Pi.
+class GPIO {
+public:
+ enum class PinFunction {
+ Input = 0,
+ Output = 1,
+ Alternate0 = 0b100,
+ Alternate1 = 0b101,
+ Alternate2 = 0b110,
+ Alternate3 = 0b111,
+ Alternate4 = 0b011,
+ Alternate5 = 0b010,
+ };
+
+ static GPIO& the();
+
+ void set_pin_function(unsigned pin_number, PinFunction);
+
+ enum class PullUpDownState {
+ Disable = 0,
+ PullDown = 1,
+ PullUp = 2,
+ };
+
+ template<size_t N>
+ void set_pin_pull_up_down_state(Array<int, N> pins, PullUpDownState state)
+ {
+ u32 enable[2] = {};
+ for (int pin : pins) {
+ if (pin < 32)
+ enable[0] |= (1 << pin);
+ else
+ enable[1] |= (1 << (pin - 32));
+ }
+ internal_enable_pins(enable, state);
+ }
+
+private:
+ GPIO();
+ void internal_enable_pins(u32 enable[2], PullUpDownState state);
+
+ GPIOControlRegisters volatile* m_registers;
+};
+
+}