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authorAndreas Kling <kling@serenityos.org>2020-07-11 23:02:42 +0200
committerAndreas Kling <kling@serenityos.org>2020-07-11 23:57:14 +0200
commita6719ede0bb3b989f4515599a2e0ff418e23f255 (patch)
tree23814f7caa16e8253f4039d45cf927f4a5328452 /DevTools
parent2ee451afedce28cc70fcecb8d286fd2504957666 (diff)
downloadserenity-a6719ede0bb3b989f4515599a2e0ff418e23f255.zip
UserspaceEmulator: Implement the SHR family of instructions
Diffstat (limited to 'DevTools')
-rw-r--r--DevTools/UserspaceEmulator/SoftCPU.cpp59
1 files changed, 50 insertions, 9 deletions
diff --git a/DevTools/UserspaceEmulator/SoftCPU.cpp b/DevTools/UserspaceEmulator/SoftCPU.cpp
index 1ad701d319..ed225442c9 100644
--- a/DevTools/UserspaceEmulator/SoftCPU.cpp
+++ b/DevTools/UserspaceEmulator/SoftCPU.cpp
@@ -1159,20 +1159,61 @@ void SoftCPU::SHRD_RM16_reg16_CL(const X86::Instruction&) { TODO(); }
void SoftCPU::SHRD_RM16_reg16_imm8(const X86::Instruction&) { TODO(); }
void SoftCPU::SHRD_RM32_reg32_CL(const X86::Instruction&) { TODO(); }
void SoftCPU::SHRD_RM32_reg32_imm8(const X86::Instruction&) { TODO(); }
-void SoftCPU::SHR_RM16_1(const X86::Instruction&) { TODO(); }
-void SoftCPU::SHR_RM16_CL(const X86::Instruction&) { TODO(); }
-void SoftCPU::SHR_RM16_imm8(const X86::Instruction&) { TODO(); }
-void SoftCPU::SHR_RM32_1(const X86::Instruction&) { TODO(); }
-void SoftCPU::SHR_RM32_CL(const X86::Instruction&) { TODO(); }
+
+void SoftCPU::SHR_RM16_1(const X86::Instruction& insn)
+{
+ auto data = insn.modrm().read16(*this, insn);
+ insn.modrm().write16(*this, insn, op_shr(*this, data, 1));
+}
+
+void SoftCPU::SHR_RM16_CL(const X86::Instruction& insn)
+{
+ auto data = insn.modrm().read16(*this, insn);
+ insn.modrm().write16(*this, insn, op_shr(*this, data, cl()));
+}
+
+void SoftCPU::SHR_RM16_imm8(const X86::Instruction& insn)
+{
+ auto data = insn.modrm().read16(*this, insn);
+ insn.modrm().write16(*this, insn, op_shr(*this, data, insn.imm8()));
+}
+
+void SoftCPU::SHR_RM32_1(const X86::Instruction& insn)
+{
+ auto data = insn.modrm().read32(*this, insn);
+ insn.modrm().write32(*this, insn, op_shr(*this, data, 1));
+}
+
+void SoftCPU::SHR_RM32_CL(const X86::Instruction& insn)
+{
+ auto data = insn.modrm().read32(*this, insn);
+ insn.modrm().write32(*this, insn, op_shr(*this, data, cl()));
+}
void SoftCPU::SHR_RM32_imm8(const X86::Instruction& insn)
{
- insn.modrm().write32(*this, insn, op_shr<u32>(*this, insn.modrm().read32(*this, insn), insn.imm8()));
+ auto data = insn.modrm().read32(*this, insn);
+ insn.modrm().write32(*this, insn, op_shr(*this, data, insn.imm8()));
+}
+
+void SoftCPU::SHR_RM8_1(const X86::Instruction& insn)
+{
+ auto data = insn.modrm().read8(*this, insn);
+ insn.modrm().write8(*this, insn, op_shr(*this, data, 1));
+}
+
+void SoftCPU::SHR_RM8_CL(const X86::Instruction& insn)
+{
+ auto data = insn.modrm().read8(*this, insn);
+ insn.modrm().write8(*this, insn, op_shr(*this, data, cl()));
+}
+
+void SoftCPU::SHR_RM8_imm8(const X86::Instruction& insn)
+{
+ auto data = insn.modrm().read8(*this, insn);
+ insn.modrm().write8(*this, insn, op_shr(*this, data, insn.imm8()));
}
-void SoftCPU::SHR_RM8_1(const X86::Instruction&) { TODO(); }
-void SoftCPU::SHR_RM8_CL(const X86::Instruction&) { TODO(); }
-void SoftCPU::SHR_RM8_imm8(const X86::Instruction&) { TODO(); }
void SoftCPU::SIDT(const X86::Instruction&) { TODO(); }
void SoftCPU::SLDT_RM16(const X86::Instruction&) { TODO(); }
void SoftCPU::SMSW_RM16(const X86::Instruction&) { TODO(); }