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authorNico Weber <thakis@chromium.org>2020-07-28 11:09:54 -0400
committerAndreas Kling <kling@serenityos.org>2020-07-28 18:55:29 +0200
commitc99a3efc5bacbcd38a0da0ed25df53bfe9a4a7bc (patch)
tree278fec8c5d24fbfa11d18f90051de7fa636cfaa9 /DevTools/UserspaceEmulator
parent6f12ab3cedfa7bfbed63ccaff109f0519184d67f (diff)
downloadserenity-c99a3efc5bacbcd38a0da0ed25df53bfe9a4a7bc.zip
LibX86: Disassemble most FPU instructions starting with D9
Some of these don't just use the REG bits of the mod/rm byte as slashes, but also the R/M bits to have up to 9 different instructions per opcode/slash combination (1 opcode requires that MOD is != 11, the other 8 have MODE == 11). This is done by making the slashes table two levels deep for these cases. Some of this is cosmetic (e.g "FST st0" has no effect already, but its bit pattern gets disassembled as "FNOP"), but for most uses it isn't. FSTENV and FSTCW have an extraordinary 0x9b prefix. This is not yet handled in this patch.
Diffstat (limited to 'DevTools/UserspaceEmulator')
-rw-r--r--DevTools/UserspaceEmulator/SoftCPU.cpp36
-rw-r--r--DevTools/UserspaceEmulator/SoftCPU.h36
2 files changed, 72 insertions, 0 deletions
diff --git a/DevTools/UserspaceEmulator/SoftCPU.cpp b/DevTools/UserspaceEmulator/SoftCPU.cpp
index 5cdbd24d3a..e8c2b3a834 100644
--- a/DevTools/UserspaceEmulator/SoftCPU.cpp
+++ b/DevTools/UserspaceEmulator/SoftCPU.cpp
@@ -1379,6 +1379,42 @@ void SoftCPU::FSUB_RM32(const X86::Instruction&) { TODO(); }
void SoftCPU::FSUBR_RM32(const X86::Instruction&) { TODO(); }
void SoftCPU::FDIV_RM32(const X86::Instruction&) { TODO(); }
void SoftCPU::FDIVR_RM32(const X86::Instruction&) { TODO(); }
+void SoftCPU::FLD_RM32(const X86::Instruction&) { TODO(); }
+void SoftCPU::FXCH(const X86::Instruction&) { TODO(); }
+void SoftCPU::FST_RM32(const X86::Instruction&) { TODO(); }
+void SoftCPU::FNOP(const X86::Instruction&) { TODO(); }
+void SoftCPU::FSTP_RM32(const X86::Instruction&) { TODO(); }
+void SoftCPU::FLDENV(const X86::Instruction&) { TODO(); }
+void SoftCPU::FCHS(const X86::Instruction&) { TODO(); }
+void SoftCPU::FABS(const X86::Instruction&) { TODO(); }
+void SoftCPU::FTST(const X86::Instruction&) { TODO(); }
+void SoftCPU::FXAM(const X86::Instruction&) { TODO(); }
+void SoftCPU::FLDCW(const X86::Instruction&) { TODO(); }
+void SoftCPU::FLD1(const X86::Instruction&) { TODO(); }
+void SoftCPU::FLDL2T(const X86::Instruction&) { TODO(); }
+void SoftCPU::FLDL2E(const X86::Instruction&) { TODO(); }
+void SoftCPU::FLDPI(const X86::Instruction&) { TODO(); }
+void SoftCPU::FLDLG2(const X86::Instruction&) { TODO(); }
+void SoftCPU::FLDLN2(const X86::Instruction&) { TODO(); }
+void SoftCPU::FLDZ(const X86::Instruction&) { TODO(); }
+void SoftCPU::FNSTENV(const X86::Instruction&) { TODO(); }
+void SoftCPU::F2XM1(const X86::Instruction&) { TODO(); };
+void SoftCPU::FYL2X(const X86::Instruction&) { TODO(); };
+void SoftCPU::FPTAN(const X86::Instruction&) { TODO(); };
+void SoftCPU::FPATAN(const X86::Instruction&) { TODO(); };
+void SoftCPU::FXTRACT(const X86::Instruction&) { TODO(); };
+void SoftCPU::FPREM1(const X86::Instruction&) { TODO(); };
+void SoftCPU::FDECSTP(const X86::Instruction&) { TODO(); };
+void SoftCPU::FINCSTP(const X86::Instruction&) { TODO(); };
+void SoftCPU::FNSTCW(const X86::Instruction&) { TODO(); };
+void SoftCPU::FPREM(const X86::Instruction&) { TODO(); };
+void SoftCPU::FYL2XP1(const X86::Instruction&) { TODO(); };
+void SoftCPU::FSQRT(const X86::Instruction&) { TODO(); };
+void SoftCPU::FSINCOS(const X86::Instruction&) { TODO(); };
+void SoftCPU::FRNDINT(const X86::Instruction&) { TODO(); };
+void SoftCPU::FSCALE(const X86::Instruction&) { TODO(); };
+void SoftCPU::FSIN(const X86::Instruction&) { TODO(); };
+void SoftCPU::FCOS(const X86::Instruction&) { TODO(); };
void SoftCPU::FADD_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FMUL_RM64(const X86::Instruction&) { TODO(); }
void SoftCPU::FCOM_RM64(const X86::Instruction&) { TODO(); }
diff --git a/DevTools/UserspaceEmulator/SoftCPU.h b/DevTools/UserspaceEmulator/SoftCPU.h
index 8148dd8353..b2687abec5 100644
--- a/DevTools/UserspaceEmulator/SoftCPU.h
+++ b/DevTools/UserspaceEmulator/SoftCPU.h
@@ -582,6 +582,42 @@ private:
virtual void FSUBR_RM32(const X86::Instruction&) override;
virtual void FDIV_RM32(const X86::Instruction&) override;
virtual void FDIVR_RM32(const X86::Instruction&) override;
+ virtual void FLD_RM32(const X86::Instruction&) override;
+ virtual void FXCH(const X86::Instruction&) override;
+ virtual void FST_RM32(const X86::Instruction&) override;
+ virtual void FNOP(const X86::Instruction&) override;
+ virtual void FSTP_RM32(const X86::Instruction&) override;
+ virtual void FLDENV(const X86::Instruction&) override;
+ virtual void FCHS(const X86::Instruction&) override;
+ virtual void FABS(const X86::Instruction&) override;
+ virtual void FTST(const X86::Instruction&) override;
+ virtual void FXAM(const X86::Instruction&) override;
+ virtual void FLDCW(const X86::Instruction&) override;
+ virtual void FLD1(const X86::Instruction&) override;
+ virtual void FLDL2T(const X86::Instruction&) override;
+ virtual void FLDL2E(const X86::Instruction&) override;
+ virtual void FLDPI(const X86::Instruction&) override;
+ virtual void FLDLG2(const X86::Instruction&) override;
+ virtual void FLDLN2(const X86::Instruction&) override;
+ virtual void FLDZ(const X86::Instruction&) override;
+ virtual void FNSTENV(const X86::Instruction&) override;
+ virtual void F2XM1(const X86::Instruction&) override;
+ virtual void FYL2X(const X86::Instruction&) override;
+ virtual void FPTAN(const X86::Instruction&) override;
+ virtual void FPATAN(const X86::Instruction&) override;
+ virtual void FXTRACT(const X86::Instruction&) override;
+ virtual void FPREM1(const X86::Instruction&) override;
+ virtual void FDECSTP(const X86::Instruction&) override;
+ virtual void FINCSTP(const X86::Instruction&) override;
+ virtual void FNSTCW(const X86::Instruction&) override;
+ virtual void FPREM(const X86::Instruction&) override;
+ virtual void FYL2XP1(const X86::Instruction&) override;
+ virtual void FSQRT(const X86::Instruction&) override;
+ virtual void FSINCOS(const X86::Instruction&) override;
+ virtual void FRNDINT(const X86::Instruction&) override;
+ virtual void FSCALE(const X86::Instruction&) override;
+ virtual void FSIN(const X86::Instruction&) override;
+ virtual void FCOS(const X86::Instruction&) override;
virtual void FADD_RM64(const X86::Instruction&) override;
virtual void FMUL_RM64(const X86::Instruction&) override;
virtual void FCOM_RM64(const X86::Instruction&) override;