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authorMarco Cutecchia <marco.cutecchia@outlook.it>2023-03-16 11:12:11 +0100
committerLinus Groh <mail@linusgroh.de>2023-03-25 16:50:36 +0000
commitbb8092d6a1994f4dd2f8df464eb20de6e60d4694 (patch)
tree7f0bd3994fc84081895fa59c8310ea04a0543646
parent28acf25035cd3500ff20915ef9770c36575f0059 (diff)
downloadserenity-bb8092d6a1994f4dd2f8df464eb20de6e60d4694.zip
Kernel: Allow enabling high level detection on GPIOs
Co-authored-by: Timon Kruiper <timonkruiper@gmail.com> Co-authored-by: Ollrogge <nils-ollrogge@outlook.de>
-rw-r--r--Kernel/Arch/aarch64/RPi/GPIO.cpp15
-rw-r--r--Kernel/Arch/aarch64/RPi/GPIO.h2
2 files changed, 17 insertions, 0 deletions
diff --git a/Kernel/Arch/aarch64/RPi/GPIO.cpp b/Kernel/Arch/aarch64/RPi/GPIO.cpp
index 7878729b06..aef8d3e5c4 100644
--- a/Kernel/Arch/aarch64/RPi/GPIO.cpp
+++ b/Kernel/Arch/aarch64/RPi/GPIO.cpp
@@ -94,4 +94,19 @@ void GPIO::internal_enable_pins(u32 enable[2], PullUpDownState state)
// I don't know if the RPi3 has that already, so this uses the old BCM2835 approach for now.
}
+void GPIO::set_pin_high_detect_enable(unsigned pin_number, bool enable)
+{
+ if (enable) {
+ if (pin_number < 32)
+ m_registers->high_detect_enable.bits[0] = m_registers->high_detect_enable.bits[0] | (1 << pin_number);
+ else
+ m_registers->high_detect_enable.bits[1] = m_registers->high_detect_enable.bits[1] | (1 << (pin_number - 32));
+ } else {
+ if (pin_number < 32)
+ m_registers->high_detect_enable.bits[0] = m_registers->high_detect_enable.bits[0] & ~(1 << pin_number);
+ else
+ m_registers->high_detect_enable.bits[1] = m_registers->high_detect_enable.bits[1] & ~(1 << (pin_number - 32));
+ }
+}
+
}
diff --git a/Kernel/Arch/aarch64/RPi/GPIO.h b/Kernel/Arch/aarch64/RPi/GPIO.h
index a24a51dbdb..a01e276251 100644
--- a/Kernel/Arch/aarch64/RPi/GPIO.h
+++ b/Kernel/Arch/aarch64/RPi/GPIO.h
@@ -50,6 +50,8 @@ public:
internal_enable_pins(enable, state);
}
+ void set_pin_high_detect_enable(unsigned pin_number, bool enable);
+
private:
GPIO();
void internal_enable_pins(u32 enable[2], PullUpDownState state);