From 8535dd702dd054a37a85e0c7971cfb43cc7b50e3 Mon Sep 17 00:00:00 2001 From: Claudio Fontana Date: Thu, 4 Feb 2021 17:39:19 +0100 Subject: cpu: move do_unaligned_access to tcg_ops MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit make it consistently SOFTMMU-only. Signed-off-by: Claudio Fontana Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson [claudio: make the field presence in cpu.h unconditional, removing the ifdefs] Message-Id: <20210204163931.7358-12-cfontana@suse.de> Signed-off-by: Richard Henderson --- target/riscv/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target/riscv/cpu.c') diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 9a23af9a9d..5e85fd58b6 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -610,7 +610,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) cc->disas_set_info = riscv_cpu_disas_set_info; #ifndef CONFIG_USER_ONLY cc->tcg_ops.do_transaction_failed = riscv_cpu_do_transaction_failed; - cc->do_unaligned_access = riscv_cpu_do_unaligned_access; + cc->tcg_ops.do_unaligned_access = riscv_cpu_do_unaligned_access; cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug; /* For now, mark unmigratable: */ cc->vmsd = &vmstate_riscv_cpu; -- cgit v1.2.3