From 1cc9e5d896695091eeb126f5c578b02ddd0fc0e4 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 22 May 2018 22:04:46 -0700 Subject: target/openrisc: Increase the TLB size The architecture supports 128 TLB entries. There is no reason not to provide all of them. In the process we need to fix a bug that failed to parameterize the configuration register that tells the operating system the number of entries. Signed-off-by: Richard Henderson Signed-off-by: Stafford Horne --- v2: - Change VMState version. --- target/openrisc/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target/openrisc/cpu.h') diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 47e94659e1..b180e30e9e 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -222,7 +222,7 @@ enum { /* TLB size */ enum { - TLB_SIZE = 64, + TLB_SIZE = 128, TLB_MASK = TLB_SIZE - 1, }; -- cgit v1.2.3