From 765b842adec4c5a359e69ca08785553599f71496 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 29 Aug 2015 12:37:33 -0700 Subject: tcg: Rename debug_insn_start to insn_start With an eye toward making it mandatory. Reviewed-by: Aurelien Jarno Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-tilegx/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target-tilegx/translate.c') diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index e70c3e5ab7..3fb7fc6a21 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -2009,7 +2009,7 @@ static void translate_one_bundle(DisasContext *dc, uint64_t bundle) dc->num_wb = 0; if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { - tcg_gen_debug_insn_start(dc->pc); + tcg_gen_insn_start(dc->pc); } qemu_log_mask(CPU_LOG_TB_IN_ASM, " %" PRIx64 ": { ", dc->pc); -- cgit v1.2.3 From 667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 29 Aug 2015 12:59:29 -0700 Subject: target-*: Unconditionally emit tcg_gen_insn_start While we're at it, emit the opcode adjacent to where we currently record data for search_pc. This puts gen_io_start et al on the "correct" side of the marker. Reviewed-by: Aurelien Jarno Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-tilegx/translate.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'target-tilegx/translate.c') diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index 3fb7fc6a21..6babc3c733 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -2008,10 +2008,6 @@ static void translate_one_bundle(DisasContext *dc, uint64_t bundle) } dc->num_wb = 0; - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { - tcg_gen_insn_start(dc->pc); - } - qemu_log_mask(CPU_LOG_TB_IN_ASM, " %" PRIx64 ": { ", dc->pc); if (get_Mode(bundle)) { notice_excp(dc, bundle, "y0", decode_y0(dc, bundle)); @@ -2100,6 +2096,8 @@ static inline void gen_intermediate_code_internal(TileGXCPU *cpu, tcg_ctx.gen_opc_instr_start[lj] = 1; tcg_ctx.gen_opc_icount[lj] = num_insns; } + tcg_gen_insn_start(dc->pc); + translate_one_bundle(dc, cpu_ldq_data(env, dc->pc)); if (dc->exit_tb) { -- cgit v1.2.3 From 959082fc4a93a016a6b697e1e0c2b373d8a3a373 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 17 Sep 2015 14:25:46 -0700 Subject: target-*: Increment num_insns immediately after tcg_gen_insn_start This does tidy the icount test common to all targets. Reviewed-by: Aurelien Jarno Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-tilegx/translate.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'target-tilegx/translate.c') diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index 6babc3c733..c23b761979 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -2097,6 +2097,7 @@ static inline void gen_intermediate_code_internal(TileGXCPU *cpu, tcg_ctx.gen_opc_icount[lj] = num_insns; } tcg_gen_insn_start(dc->pc); + num_insns++; translate_one_bundle(dc, cpu_ldq_data(env, dc->pc)); @@ -2105,7 +2106,7 @@ static inline void gen_intermediate_code_internal(TileGXCPU *cpu, break; } dc->pc += TILEGX_BUNDLE_SIZE_IN_BYTES; - if (++num_insns >= max_insns + if (num_insns >= max_insns || dc->pc >= next_page_start || tcg_op_buf_full()) { /* Ending the TB due to TB size or page boundary. Set PC. */ -- cgit v1.2.3 From 190ce7fbc79fd0883a6170d7f30da59d366e6830 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Mon, 31 Aug 2015 14:34:41 -0700 Subject: tcg: Add TCG_MAX_INSNS Adjust all translators to respect it. Reviewed-by: Aurelien Jarno Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-tilegx/translate.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'target-tilegx/translate.c') diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index c23b761979..a6b9cd87ac 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -2081,6 +2081,9 @@ static inline void gen_intermediate_code_internal(TileGXCPU *cpu, if (cs->singlestep_enabled || singlestep) { max_insns = 1; } + if (max_insns > TCG_MAX_INSNS) { + max_insns = TCG_MAX_INSNS; + } gen_tb_start(tb); while (1) { -- cgit v1.2.3 From bad729e272387de7dbfa3ec4319036552fc6c107 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 1 Sep 2015 15:51:12 -0700 Subject: tcg: Pass data argument to restore_state_to_opc The gen_opc_* arrays are already redundant with the data stored in the insn_start arguments. Transition restore_state_to_opc to use data from the latter. Reviewed-by: Aurelien Jarno Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-tilegx/translate.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'target-tilegx/translate.c') diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index a6b9cd87ac..eae5622a9a 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -2144,9 +2144,10 @@ void gen_intermediate_code_pc(CPUTLGState *env, struct TranslationBlock *tb) gen_intermediate_code_internal(tilegx_env_get_cpu(env), tb, true); } -void restore_state_to_opc(CPUTLGState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUTLGState *env, TranslationBlock *tb, + target_ulong *data) { - env->pc = tcg_ctx.gen_opc_pc[pc_pos]; + env->pc = data[0]; } void tilegx_tcg_init(void) -- cgit v1.2.3 From 4e5e1215156662b2b153255c49d4640d82c5568b Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 1 Sep 2015 20:01:40 -0700 Subject: tcg: Remove gen_intermediate_code_pc It is no longer used, so tidy up everything reached by it. This includes the gen_opc_* arrays, the search_pc parameter and the inline gen_intermediate_code_internal functions. Reviewed-by: Aurelien Jarno Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-tilegx/translate.c | 41 ++++------------------------------------- 1 file changed, 4 insertions(+), 37 deletions(-) (limited to 'target-tilegx/translate.c') diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index eae5622a9a..ff96165c94 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -2049,17 +2049,14 @@ static void translate_one_bundle(DisasContext *dc, uint64_t bundle) } } -static inline void gen_intermediate_code_internal(TileGXCPU *cpu, - TranslationBlock *tb, - bool search_pc) +void gen_intermediate_code(CPUTLGState *env, struct TranslationBlock *tb) { + TileGXCPU *cpu = tilegx_env_get_cpu(env); DisasContext ctx; DisasContext *dc = &ctx; CPUState *cs = CPU(cpu); - CPUTLGState *env = &cpu->env; uint64_t pc_start = tb->pc; uint64_t next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; - int j, lj = -1; int num_insns = 0; int max_insns = tb->cflags & CF_COUNT_MASK; @@ -2087,18 +2084,6 @@ static inline void gen_intermediate_code_internal(TileGXCPU *cpu, gen_tb_start(tb); while (1) { - if (search_pc) { - j = tcg_op_buf_count(); - if (lj < j) { - lj++; - while (lj < j) { - tcg_ctx.gen_opc_instr_start[lj++] = 0; - } - } - tcg_ctx.gen_opc_pc[lj] = dc->pc; - tcg_ctx.gen_opc_instr_start[lj] = 1; - tcg_ctx.gen_opc_icount[lj] = num_insns; - } tcg_gen_insn_start(dc->pc); num_insns++; @@ -2120,30 +2105,12 @@ static inline void gen_intermediate_code_internal(TileGXCPU *cpu, } gen_tb_end(tb, num_insns); - if (search_pc) { - j = tcg_op_buf_count(); - lj++; - while (lj <= j) { - tcg_ctx.gen_opc_instr_start[lj++] = 0; - } - } else { - tb->size = dc->pc - pc_start; - tb->icount = num_insns; - } + tb->size = dc->pc - pc_start; + tb->icount = num_insns; qemu_log_mask(CPU_LOG_TB_IN_ASM, "\n"); } -void gen_intermediate_code(CPUTLGState *env, struct TranslationBlock *tb) -{ - gen_intermediate_code_internal(tilegx_env_get_cpu(env), tb, false); -} - -void gen_intermediate_code_pc(CPUTLGState *env, struct TranslationBlock *tb) -{ - gen_intermediate_code_internal(tilegx_env_get_cpu(env), tb, true); -} - void restore_state_to_opc(CPUTLGState *env, TranslationBlock *tb, target_ulong *data) { -- cgit v1.2.3