From 4e5d45ae5756123b3b7000c8b0b3d3a9ea4737da Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Fri, 29 May 2015 16:31:58 +1000 Subject: target-microblaze: Convert use-fpu to a CPU property Originally the use-fpu PVR bits were manually set for each machine. This is a hassle and difficult to read, instead set them based on the CPU properties. Signed-off-by: Alistair Francis Reviewed-by: Peter Crosthwaite Signed-off-by: Edgar E. Iglesias --- target-microblaze/cpu.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) (limited to 'target-microblaze/cpu.c') diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index 0f805d334f..b857056a33 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -110,12 +110,14 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) | PVR2_USE_DIV_MASK \ | PVR2_USE_HW_MUL_MASK \ | PVR2_USE_MUL64_MASK \ - | PVR2_USE_FPU_MASK \ - | PVR2_USE_FPU2_MASK \ | PVR2_FPU_EXC_MASK \ | 0; - env->pvr.regs[0] |= cpu->cfg.stackprot ? PVR0_SPROT_MASK : 0; + env->pvr.regs[0] |= (cpu->cfg.stackprot ? PVR0_SPROT_MASK : 0) | + (cpu->cfg.usefpu ? PVR0_USE_FPU_MASK : 0); + + env->pvr.regs[2] |= (cpu->cfg.usefpu ? PVR2_USE_FPU_MASK : 0) | + (cpu->cfg.usefpu > 1 ? PVR2_USE_FPU2_MASK : 0); env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */ env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17); @@ -161,6 +163,11 @@ static Property mb_properties[] = { DEFINE_PROP_UINT32("base-vectors", MicroBlazeCPU, cfg.base_vectors, 0), DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot, true), + /* If use-fpu > 0 - FPU is enabled + * If use-fpu = 2 - Floating point conversion and square root instructions + * are enabled + */ + DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.usefpu, 2), DEFINE_PROP_END_OF_LIST(), }; -- cgit v1.2.3