From c04e34a9823f8d2ff19ed2b9b3128c8b3e498c01 Mon Sep 17 00:00:00 2001 From: xiaoqiang zhao Date: Thu, 25 May 2017 21:34:48 +0800 Subject: hw/timer: QOM'ify m48txx_sysbus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * split the old SysBus init function into an instance_init and a Device realize function * use DeviceClass::realize instead of SysBusDeviceClass::init * assign DeviceClass::vmsd instead of using vmstate_register function Signed-off-by: xiaoqiang zhao Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Mark Cave-Ayland --- hw/timer/m48t59.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) (limited to 'hw/timer/m48t59.c') diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c index 4a064fbfd2..844aad540e 100644 --- a/hw/timer/m48t59.c +++ b/hw/timer/m48t59.c @@ -640,34 +640,33 @@ void m48t59_realize_common(M48t59State *s, Error **errp) s->wd_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &watchdog_cb, s); } qemu_get_timedate(&s->alarm, 0); - - vmstate_register(NULL, -1, &vmstate_m48t59, s); } -static int m48t59_init1(SysBusDevice *dev) +static void m48t59_init1(Object *obj) { - M48txxSysBusDeviceClass *u = M48TXX_SYS_BUS_GET_CLASS(dev); - M48txxSysBusState *d = M48TXX_SYS_BUS(dev); - Object *o = OBJECT(dev); + M48txxSysBusDeviceClass *u = M48TXX_SYS_BUS_GET_CLASS(obj); + M48txxSysBusState *d = M48TXX_SYS_BUS(obj); + SysBusDevice *dev = SYS_BUS_DEVICE(obj); M48t59State *s = &d->state; - Error *err = NULL; s->model = u->info.model; s->size = u->info.size; sysbus_init_irq(dev, &s->IRQ); - memory_region_init_io(&s->iomem, o, &nvram_ops, s, "m48t59.nvram", + memory_region_init_io(&s->iomem, obj, &nvram_ops, s, "m48t59.nvram", s->size); - memory_region_init_io(&d->io, o, &m48t59_io_ops, s, "m48t59", 4); - sysbus_init_mmio(dev, &s->iomem); - sysbus_init_mmio(dev, &d->io); - m48t59_realize_common(s, &err); - if (err != NULL) { - error_free(err); - return -1; - } + memory_region_init_io(&d->io, obj, &m48t59_io_ops, s, "m48t59", 4); +} + +static void m48t59_realize(DeviceState *dev, Error **errp) +{ + M48txxSysBusState *d = M48TXX_SYS_BUS(dev); + M48t59State *s = &d->state; + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - return 0; + sysbus_init_mmio(sbd, &s->iomem); + sysbus_init_mmio(sbd, &d->io); + m48t59_realize_common(s, errp); } static uint32_t m48txx_sysbus_read(Nvram *obj, uint32_t addr) @@ -696,12 +695,12 @@ static Property m48t59_sysbus_properties[] = { static void m48txx_sysbus_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); NvramClass *nc = NVRAM_CLASS(klass); - k->init = m48t59_init1; + dc->realize = m48t59_realize; dc->reset = m48t59_reset_sysbus; dc->props = m48t59_sysbus_properties; + dc->vmsd = &vmstate_m48t59; nc->read = m48txx_sysbus_read; nc->write = m48txx_sysbus_write; nc->toggle_lock = m48txx_sysbus_toggle_lock; @@ -725,6 +724,7 @@ static const TypeInfo m48txx_sysbus_type_info = { .name = TYPE_M48TXX_SYS_BUS, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(M48txxSysBusState), + .instance_init = m48t59_init1, .abstract = true, .class_init = m48txx_sysbus_class_init, .interfaces = (InterfaceInfo[]) { -- cgit v1.2.3