From 73c694565c6144e0c4e15041b5250a04a25107c3 Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Mon, 13 Jan 2014 13:35:26 +1000 Subject: Microblaze: Convert Microblaze-pic handling to GPIOs This patch uses inbound GPIO lines (IRQ and FIR) for interrupts instead of using the old pic_cpu method, which doesn't correspond to real hardware. This creates the CPU's inbound IRQ and FIR GPIO lines and updates the Microblaze boards to use this new method. Signed-off-by: Alistair Francis Suggested-by: Peter Crosthwaite Reveiwed-by: Edgar E. Iglesias Tested-by: Edgar E. Iglesias Signed-off-by: Edgar E. Iglesias --- hw/microblaze/petalogix_s3adsp1800_mmu.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'hw/microblaze/petalogix_s3adsp1800_mmu.c') diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c index ec6489c2d3..f50021506c 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -35,7 +35,6 @@ #include "exec/address-spaces.h" #include "boot.h" -#include "pic_cpu.h" #define LMB_BRAM_SIZE (128 * 1024) #define FLASH_SIZE (16 * 1024 * 1024) @@ -63,13 +62,12 @@ petalogix_s3adsp1800_init(QEMUMachineInitArgs *args) const char *cpu_model = args->cpu_model; DeviceState *dev; MicroBlazeCPU *cpu; - CPUMBState *env; DriveInfo *dinfo; int i; hwaddr ddr_base = MEMORY_BASEADDR; MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1); MemoryRegion *phys_ram = g_new(MemoryRegion, 1); - qemu_irq irq[32], *cpu_irq; + qemu_irq irq[32]; MemoryRegion *sysmem = get_system_memory(); /* init CPUs */ @@ -77,7 +75,6 @@ petalogix_s3adsp1800_init(QEMUMachineInitArgs *args) cpu_model = "microblaze"; } cpu = cpu_mb_init(cpu_model); - env = &cpu->env; /* Attach emulated BRAM through the LMB. */ memory_region_init_ram(phys_lmb_bram, NULL, @@ -96,8 +93,8 @@ petalogix_s3adsp1800_init(QEMUMachineInitArgs *args) FLASH_SIZE >> 16, 1, 0x89, 0x18, 0x0000, 0x0, 1); - cpu_irq = microblaze_pic_init_cpu(env); - dev = xilinx_intc_create(INTC_BASEADDR, cpu_irq[0], 0xA); + dev = xilinx_intc_create(INTC_BASEADDR, qdev_get_gpio_in(DEVICE(cpu), + MB_CPU_IRQ), 0xA); for (i = 0; i < 32; i++) { irq[i] = qdev_get_gpio_in(dev, i); } -- cgit v1.2.3