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2012-01-10tcg/arm: Use r6 as TCG_AREG0 to avoid clash with Thumb framepointerPeter Maydell
On ARM, in Thumb mode r7 is used for the framepointer; this meant that we would fail to compile in debug mode because we were using r7 for TCG_AREG0. Shift to r6 instead to avoid this clash. (Bug reported as LP:870990.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-12-14tcg/arm: remove fixed map code buffer restrictionDr. David Alan Gilbert
On ARM, don't map the code buffer at a fixed location, and fix up the call/goto tcg routines to let it do long jumps. Mapping the code buffer at a fixed address could sometimes result in it being mapped over the top of the heap with pretty random results. Signed-off-by: Dr. David Alan Gilbert <david.gilbert@linaro.org> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-12-14tcg: make tcg_const_ptr actually accept a pointer argumentPeter Maydell
Make tcg_const_ptr() include a cast so that you can pass it a pointer. This allows us to drop the casts we had in all the places that use this macro. Acked-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-12-09tcg: Remove redundant declarations of TCG_TARGET_REG_BITSStefan Weil
TCG_TARGET_REG_BITS is declared in tcg.h for all TCG targets. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-12-02fix spelling in tcg sub directoryDong Xu Wang
Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-11-28tci: Make flush_icache_range() inlineStefan Weil
This is standard for other tcg targets and improves tci, too. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-11-19tcg-sparc: Fix set-but-not used warnings.Richard Henderson
In both cases, val is computed, but then not used in the subsequent line, which then re-computes the quantity in a different type (int32_t vs unsigned long). Keep the computation type that's been working so far. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-11-19Merge branch 's390-1.0' of git://repo.or.cz/qemu/agrafBlue Swirl
* 's390-1.0' of git://repo.or.cz/qemu/agraf: s390x: initialize virtio dev region tcg: Use TCGReg for standard tcg-target entry points. tcg: Standardize on TCGReg as the enum for hard registers s390x: Add shutdown for TCG s390-virtio machine s390: Fix cpu shutdown for KVM s390: fix short kernel command lines s390: fix reset hypercall to reset the status s390x: implement SIGP restart and shutdown s390x: implement rrbe instruction properly s390x: update R and C bits in storage key s390x: make ipte 31-bit aware s390x: add ldeb instruction
2011-11-14tcg: Use TCGReg for standard tcg-target entry points.Richard Henderson
Including tcg_out_ld, tcg_out_st, tcg_out_mov, tcg_out_movi. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-11-14tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson
Most targets did not name the enum; tci used TCGRegister. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-11-11tcg-ppc64: Fix compile errors for userspace only builds with gcc 4.6David Gibson
tcg/ppc64/tcg-target.c has a couple of places where variables are set unconditionally, but otherwise used only for softmmu builds, not userspace only builds. This causes compiler warnings (which are fatal by default) when compiling for a ppc64 host with gcc 4.6. This patch fixes the problem by moving the code which defines and sets the variables into the CONFIG_SOFTMMU guarded regions. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-11-02Merge branch 'tci' of git://qemu.weilnetz.de/qemuBlue Swirl
* 'tci' of git://qemu.weilnetz.de/qemu: tcg: Add tcg interpreter to configure / make tcg: Add tci disassembler tcg: Add interpreter for bytecode tcg: Add bytecode generator for tcg interpreter tcg: Make ARRAY_SIZE(tcg_op_defs) globally available tcg: TCG targets may define tcg_qemu_tb_exec
2011-11-02tcg: Fix whitespace in tcg-op.h.Richard Henderson
Removing the only tabs in the file. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: malc <av1474@comtv.ru>
2011-11-02tcg: Fix regression in tcg_gen_deposit_i64.Richard Henderson
The error being caused by the failure to copy the other half of the input to the output after having narrowed the deposit operation. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: malc <av1474@comtv.ru>
2011-10-31tcg: Add bytecode generator for tcg interpreterStefan Weil
Unlike other tcg target code generators, this one does not generate machine code for some cpu. It generates machine independent bytecode which is interpreted later. This allows running QEMU on any host. Interpreted bytecode is slower than direct execution of generated machine code. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-10-31tcg: Make ARRAY_SIZE(tcg_op_defs) globally availableStefan Weil
tcg_op_defs was already a global array. The tci disassembler also needs ARRAY_SIZE(tcg_op_defs), so add a new global constant with this value. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-10-31tcg: TCG targets may define tcg_qemu_tb_execStefan Weil
Targets may use a non standard definition of tcg_tb_exec by defining this macro in their tcg_target.h. This is used here by ppc. It will be used by the TCG interpreter, too. Cc: malc <av1474@comtv.ru> Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-10-30tcg: Optimize some forms of deposit.Richard Henderson
If the deposit replaces the entire word, optimize to a move. If we're inserting to the top of the word, avoid the mask of arg2 as we'll be shifting out all of the garbage and shifting in zeros. If the host is 32-bit, reduce a 64-bit deposit to a 32-bit deposit when possible. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-14tcg: Fix spelling in comment (varables -> variables)Stefan Weil
Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-10-08tcg/s390: Remove unused tcg_out_addi()Peter Maydell
Remove the unused function tcg_out_addi() from the s390 TCG backend; this brings it into line with other backends. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-08tcg/ia64: Remove unused tcg_out_addi()Peter Maydell
Remove the unused function tcg_out_addi() from the ia64 TCG backend; this brings it into line with other backends. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01tcg-i386: Introduce limited deposit supportJan Kiszka
x86 cannot provide an optimized generic deposit implementation. But at least for a few special cases, namely for writing bits 0..7, 8..15, and 0..15, versions using only a single instruction are feasible. Introducing such limited support improves emulating 16-bit x86 code on x86, but also rarer cases where 32-bit or 64-bit code accesses bytes or words. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01tcg/arm: Remove unused tcg_out_addi()Peter Maydell
Remove the unused function tcg_out_addi() from the ARM TCG backend; this fixes a compilation failure on ARM hosts with newer gcc. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01tcg: Add some assertionsStefan Weil
Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01tcg: Add forward declarations for local functionsStefan Weil
These functions are defined in the tcg target specific file tcg-target.c. The forward declarations assert that every tcg target uses the same function prototype. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.hStefan Weil
It is now declared for all tcg targets in tcg.h, so the tcg target specific declarations are redundant. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01tcg: Declare TCG_TARGET_REG_BITS in tcg.hStefan Weil
TCG_TARGET_REG_BITS can be determined by the compiler, so there is no need to declare it for each individual tcg target. This is especially important for new tcg targets which will be supported by the tcg interpreter. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-17tcg/ppc64: Only one call output register needed for 64 bit hostsStefan Weil
The second register is only needed for 32 bit hosts. Cc: Vassili Karpov <av1474@comtv.ru> Fine-with-me'd-by: Vassili Karpov <av1474@comtv.ru> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-17tcg/sparc: Only one call output register needed for 64 bit hostsStefan Weil
The second register is only needed for 32 bit hosts. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-17tcg/s390: Only one call output register needed for 64 bit hostsStefan Weil
The second register is only needed for 32 bit hosts. Cc: Alexander Graf <agraf@suse.de> Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-17tcg/ia64: Only one call output register needed for 64 bit hostsStefan Weil
The second register is never used for ia64 hosts. Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-17tcg/i386: Only one call output register needed for 64 bit hostsStefan Weil
The second register is only needed for 32 bit hosts. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-09tcg/ppc64: Fix zero extension code generation bug for ppc64 hostThomas Huth
The ppc64 code generation backend uses an rldicr (Rotate Left Double Immediate and Clear Right) instruction to implement zero extension of a 32 bit quantity to a 64 bit quantity (INDEX_op_ext32u_i64). However this is wrong - this instruction clears specified low bits of the value, instead of high bits as we require for a zero extension. It should instead use an rldicl (Rotate Left Double Immediate and Clear Left) instruction. Presumably amongst other things, this causes the SLOF firmware image used with -M pseries to not boot on a ppc64 host. It appears this bug was exposed by commit 0bf1dbdcc935dfc220a93cd990e947e90706aec6 (tcg/ppc64: fix 16/32 mixup) which enabled the use of the op_ext32u_i64 operation on the ppc64 backend. Signed-off-by: Thomas Huth <thuth@de.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: malc <av1474@comtv.ru>
2011-09-01tcg/ppc/tcg-target.c: Avoid 'set but not used' gcc warningsPeter Maydell
Move the declaration and initialisation of some variables in tcg_out_qemu_ld and tcg_out_qemu_st inside CONFIG_SOFTMMU, to avoid the "variable set but not used" warning of gcc 4.6. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: malc <av1474@comtv.ru>
2011-08-28TCG: improve optimizer debuggingBlue Swirl
Use enum TCGOpcode instead of plain old int so that the name of current op can be seen in GDB. Add a default case to switch so that GCC does not complain about unhandled enum cases. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-23tcg: Update --enable-debug for TCG_OPF_NOT_PRESENT.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-08-22tcg/ppc64: fix 16/32 mixupmalc
Signed-off-by: malc <av1474@comtv.ru>
2011-08-22tcg/ppc64: implement not_i32/64 and ext32u_i64malc
Signed-off-by: malc <av1474@comtv.ru>
2011-08-22tcg/ppc32: implement deposit_i32malc
Signed-off-by: malc <av1474@comtv.ru>
2011-08-21tcg-ia64: Fix typos in AREG0 setup in prologue.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-21tcg-hppa: Fix CPU_TEMP_BUF_NLONGS oversight.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-21tcg: Constant fold neg, andc, orc, eqv, nand, nor.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-21tcg: Always define all of the TCGOpcode enum members.Richard Henderson
By always defining these symbols, we can eliminate a lot of ifdefs. To allow this to be checked reliably, the semantics of the TCG_TARGET_HAS_* macros must be changed from def/undef to true/false. This allows even more ifdefs to be removed, converting them into C if statements. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-21tcg: Add and use TCG_OPF_64BIT.Richard Henderson
This allows the simplification of the op_bits function from tcg/optimize.c. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-20Use glib memory allocation and free functionsAnthony Liguori
qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-07TCG: fix copy propagationBlue Swirl
Copy propagation introduced in 22613af4a6d9602001e6d0e7b6d98aa40aa018dc considered only global registers. However, register temps and stack allocated locals must be handled differently because register temps don't survive across brcond. Fix by propagating only within same class of temps. Tested-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-30TCG: fix breakage by previous patchBlue Swirl
Fix incorrect logic and typos in previous commit 1bfd07bdfe56cea43dbe258dcb161e46b0ee29b7. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-30TCG: fix breakage on some RISC hostsBlue Swirl
Fix breakage by a640f03178c22355a158fa9378e4f8bfa4f517a6 and 55c0975c5b358e948b9ae7bd7b07eff92508e756. Some TCG targets don't implement all TCG ops, so make optimizing those conditional. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-30Do constant folding for unary operations.Kirill Batuzov
Perform constant folding for NOT and EXT{8,16,32}{S,U} operations. Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-30Do constant folding for shift operations.Kirill Batuzov
Perform constant forlding for SHR, SHL, SAR, ROTR, ROTL operations. Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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