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QEMU is a generic and open source machine & userspace emulator and virtualizer.
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2010-04-18
tcg/ppc: Remove redundant comparison from brcond2
malc
2010-04-17
tcg/ppc: Fix signed versions of brcond2
malc
2010-04-06
tcg/ppc: Fix typo
malc
2010-04-06
tcg/ppc: Implment bswap16/32
malc
2010-04-05
tcg/ppc: Implement eqv, nand and nor
malc
2010-04-05
Split TLB addend and target_phys_addr_t
Paul Brook
2010-04-04
tcg/ppc: Fix not_i32
malc
2010-03-26
tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.
Richard Henderson
2010-03-26
tcg: Allow target-specific implementation of NOR.
Richard Henderson
2010-03-26
tcg: Allow target-specific implementation of NAND.
Richard Henderson
2010-03-26
tcg: Allow target-specific implementation of EQV.
Richard Henderson
2010-03-26
tcg: Use TCGCond where appropriate.
Richard Henderson
2010-03-26
tcg: Name the opcode enumeration.
Richard Henderson
2010-03-26
remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]
Paolo Bonzini
2010-03-13
tcg/ppc[64]: Only define addend load helpers in softmmu case
malc
2010-02-27
tcg/ppc: Fix right rotation
malc
2010-02-23
tcg/ppc: Fix typo
malc
2010-02-22
tcg/ppc: Implement some of the optional ops
malc
2010-02-22
tcg: fix build on 32-bit hppa, ppc and sparc hosts
Jay Foad
2010-02-20
tcg: Add comments for all optional instructions not implemented.
Richard Henderson
2010-02-20
tcg/ppc: Consistently use calling convention selection macros
malc
2010-02-20
Use ppc host calling convention definitions to set TCG_TARGET_CALL_{ALIGN_ARG...
Juergen Lock
2010-02-07
tcg/ppc32: proper setcond implementation
malc
2010-02-07
tcg/ppc32: implement setcond[2]
malc
2009-09-27
tcg/ppc: always use tcg_out_call
malc
2009-09-06
When targeting PPU use rlwinm instead of andi. if possible
malc
2009-07-20
Fix rbase initialization
malc
2009-07-18
PPC 32/64 GUEST_BASE support
malc
2009-07-18
Fix LHZX opcode value
malc
2009-04-11
Whack [LS]MW
malc
2009-04-11
Remove reserved registers from tcg_target_reg_alloc_order
malc
2009-03-08
Prune unused TCG_AREGs
blueswir1
2009-02-11
Add missing r24..r26 to calle save registers
malc
2009-01-26
R13 is reserved for small data area pointer by SVR4 PPC ABI
malc
2008-12-22
Use the ARRAY_SIZE() macro where appropriate.
malc
2008-12-10
Introduce and use cache-utils.[ch]
malc
2008-11-18
Preliminary AIX support
malc
2008-11-12
Rename misnamed BACK_CHAIN_OFFSET to LR_OFFSET
malc
2008-10-05
Add some missing static and const qualifiers, reg_names only used if NDEBUG set
blueswir1
2008-09-22
Avoid clobbering input register in qemu_ld64+bswap+useronly case
malc
2008-08-30
Fix some warnings that would be generated by gcc -Wredundant-decls
blueswir1
2008-08-21
Relax qemu_ld/st constraints for !SOFTMMU case
malc
2008-08-03
Account for MacOS X ABI reserved space in linkage area (Andreas Faerber)
malc
2008-08-03
Preliminary MacOS X on PPC32 support
malc
2008-07-29
On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64
malc
2008-07-28
Do not try handle "special" arguments of and/or/xor/shl/shr, upper level does it
malc
2008-07-23
Provide extNs_M instructions
malc
2008-07-03
Fuse EQ and NE handling in tcg_out_brcond2
malc
2008-07-03
Mask LL portion of B to 24 bits in tcg_out_b (Thanks to Thiemo Seufer)
malc
2008-06-23
According to gcc-4.3.0/gcc/config/rs6000/crtsavres.asm R13 is volatile
malc
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