summaryrefslogtreecommitdiff
path: root/tcg/ppc
AgeCommit message (Expand)Author
2012-06-24TCG: Fix compile breakage in tcg_dump_opsAlexander Graf
2012-05-27tcg/ppc: Handle _CALL_DARWIN being undefined on DarwinAndreas Färber
2012-05-09tcg/ppc: Fix CONFIG_TCG_PASS_AREG0 modeAndreas Färber
2012-05-09tcg/ppc: Clobber r5 for 64-bit qemu_ldAndreas Färber
2012-05-09tcg/ppc: Don't hardcode register numbersAndreas Färber
2012-05-09tcg/ppc: Do not overwrite lower address word on Darwin and AIXAndreas Färber
2012-05-03Bail out if CONFIG_TCG_PASS_AREG0 is definedmalc
2012-03-18softmmu templates: optionally pass CPUState to memory access functionsBlue Swirl
2012-03-18i386: Remove REGPARMBlue Swirl
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber
2011-11-14tcg: Use TCGReg for standard tcg-target entry points.Richard Henderson
2011-11-14tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson
2011-10-31tcg: TCG targets may define tcg_qemu_tb_execStefan Weil
2011-10-01tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.hStefan Weil
2011-09-01tcg/ppc/tcg-target.c: Avoid 'set but not used' gcc warningsPeter Maydell
2011-08-22tcg/ppc32: implement deposit_i32malc
2011-08-21tcg: Always define all of the TCGOpcode enum members.Richard Henderson
2011-06-28TCG/PPC: use stack for TCG tempsBlue Swirl
2011-06-28tcg/ppc: Remove tcg_out_addimalc
2011-06-26Delegate setup of TCG temporaries to targetsBlue Swirl
2011-06-26cpu-exec.c: avoid AREG0 useBlue Swirl
2010-08-15TCG: Fix Darwin/ppc calling convention recognitionAndreas Färber
2010-06-29tcg-ppc: Conditionally reserve TCG_GUEST_BASE_REG.Richard Henderson
2010-06-09tcg: Make some tcg-target.c routines static.Richard Henderson
2010-06-09tcg: Add TYPE parameter to tcg_out_mov.Richard Henderson
2010-04-18tcg/ppc: Remove redundant comparison from brcond2malc
2010-04-17tcg/ppc: Fix signed versions of brcond2malc
2010-04-06tcg/ppc: Fix typomalc
2010-04-06tcg/ppc: Implment bswap16/32malc
2010-04-05tcg/ppc: Implement eqv, nand and normalc
2010-04-05Split TLB addend and target_phys_addr_tPaul Brook
2010-04-04tcg/ppc: Fix not_i32malc
2010-03-26tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.Richard Henderson
2010-03-26tcg: Allow target-specific implementation of NOR.Richard Henderson
2010-03-26tcg: Allow target-specific implementation of NAND.Richard Henderson
2010-03-26tcg: Allow target-specific implementation of EQV.Richard Henderson
2010-03-26tcg: Use TCGCond where appropriate.Richard Henderson
2010-03-26tcg: Name the opcode enumeration.Richard Henderson
2010-03-26remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]Paolo Bonzini
2010-03-13tcg/ppc[64]: Only define addend load helpers in softmmu casemalc
2010-02-27tcg/ppc: Fix right rotationmalc
2010-02-23tcg/ppc: Fix typomalc
2010-02-22tcg/ppc: Implement some of the optional opsmalc
2010-02-22tcg: fix build on 32-bit hppa, ppc and sparc hostsJay Foad
2010-02-20tcg: Add comments for all optional instructions not implemented.Richard Henderson
2010-02-20tcg/ppc: Consistently use calling convention selection macrosmalc
2010-02-20Use ppc host calling convention definitions to set TCG_TARGET_CALL_{ALIGN_ARG...Juergen Lock
2010-02-07tcg/ppc32: proper setcond implementationmalc
2010-02-07tcg/ppc32: implement setcond[2]malc
2009-09-27tcg/ppc: always use tcg_out_callmalc
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-16 22:03:43 +0000