summaryrefslogtreecommitdiff
path: root/tcg/ppc
AgeCommit message (Collapse)Author
2012-06-24TCG: Fix compile breakage in tcg_dump_opsAlexander Graf
Commit eeacee4d865 changed the syntax of tcg_dump_ops, but didn't convert all users (notably missing the ppc ones) to it. Fix them to the new syntax. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: malc <av1474@comtv.ru>
2012-05-27tcg/ppc: Handle _CALL_DARWIN being undefined on DarwinAndreas Färber
powerpc-apple-darwin9-gcc-4.2.1 (GCC) 4.2.1 (Apple Inc. build 5577) does not define _CALL_DARWIN, leading to unexpected behavior w.r.t. register clobbering and stack frame layout. Since _CALL_DARWIN is a reserved identifier, define a custom TCG_TARGET_CALL_DARWIN based on either _CALL_DARWIN or __APPLE__. Signed-off-by: Andreas F?rber <andreas.faerber@web.de> Signed-off-by: malc <av1474@comtv.ru>
2012-05-09tcg/ppc: Fix CONFIG_TCG_PASS_AREG0 modeAndreas Färber
Adjust the tcg_out_qemu_{ld,st}() slow paths to pass AREG0 in r3, based on patches by malc. Also adjust the registers clobbered, based on patch by Alex. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de> [AF: Do not hardcode r3 for AREG0, requested by Alex] Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-05-09tcg/ppc: Clobber r5 for 64-bit qemu_ldAndreas Färber
This accounts for the additional addr_reg2 register. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-05-09tcg/ppc: Don't hardcode register numbersAndreas Färber
Also assure i64 alignment where necessary. Alignment code optimization suggested by malc. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-05-09tcg/ppc: Do not overwrite lower address word on Darwin and AIXAndreas Färber
For targets where TARGET_LONG_BITS != 32, i.e. 64-bit guests, addr_reg is moved to r4. For hosts without TCG_TARGET_CALL_ALIGN_ARGS either data_reg2 or data_reg or a masked version thereof would overwrite r4. Place it in r5 instead, matching TCG_TARGET_CALL_ALIGN_ARGS hosts. This fixes immediate crashes of 64-bit guests observed on Darwin/ppc but not on Darwin/ppc64. Signed-off-by: Andreas Färber <andreas.faerber@web.de> Acked-by: malc <av1474@comtv.ru> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-05-03Bail out if CONFIG_TCG_PASS_AREG0 is definedmalc
Signed-off-by: malc <av1474@comtv.ru>
2012-03-18softmmu templates: optionally pass CPUState to memory access functionsBlue Swirl
Optionally, make memory access helpers take a parameter for CPUState instead of relying on global env. On most targets, perform simple moves to reorder registers. On i386, switch from regparm(3) calling convention to standard stack-based version. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18i386: Remove REGPARMBlue Swirl
Use stack based calling convention (GCC default) for interfacing with generated code instead of register based convention (regparm(3)). Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber
Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-11-14tcg: Use TCGReg for standard tcg-target entry points.Richard Henderson
Including tcg_out_ld, tcg_out_st, tcg_out_mov, tcg_out_movi. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-11-14tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson
Most targets did not name the enum; tci used TCGRegister. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-31tcg: TCG targets may define tcg_qemu_tb_execStefan Weil
Targets may use a non standard definition of tcg_tb_exec by defining this macro in their tcg_target.h. This is used here by ppc. It will be used by the TCG interpreter, too. Cc: malc <av1474@comtv.ru> Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-10-01tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.hStefan Weil
It is now declared for all tcg targets in tcg.h, so the tcg target specific declarations are redundant. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-01tcg/ppc/tcg-target.c: Avoid 'set but not used' gcc warningsPeter Maydell
Move the declaration and initialisation of some variables in tcg_out_qemu_ld and tcg_out_qemu_st inside CONFIG_SOFTMMU, to avoid the "variable set but not used" warning of gcc 4.6. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: malc <av1474@comtv.ru>
2011-08-22tcg/ppc32: implement deposit_i32malc
Signed-off-by: malc <av1474@comtv.ru>
2011-08-21tcg: Always define all of the TCGOpcode enum members.Richard Henderson
By always defining these symbols, we can eliminate a lot of ifdefs. To allow this to be checked reliably, the semantics of the TCG_TARGET_HAS_* macros must be changed from def/undef to true/false. This allows even more ifdefs to be removed, converting them into C if statements. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-28TCG/PPC: use stack for TCG tempsBlue Swirl
Use stack instead of temp_buf array in CPUState for TCG temps. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: malc <av1474@comtv.ru>
2011-06-28tcg/ppc: Remove tcg_out_addimalc
The only user (within tcg.c) was removed Signed-off-by: malc <av1474@comtv.ru>
2011-06-26Delegate setup of TCG temporaries to targetsBlue Swirl
Delegate TCG temp_buf setup to targets, so that they can use a stack frame later instead. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26cpu-exec.c: avoid AREG0 useBlue Swirl
Make functions take a parameter for CPUState instead of relying on global env. Pass CPUState pointer to TCG prologue, which moves it to AREG0. Thanks to Peter Maydell and Laurent Desnogues for the ARM prologue change. Revert the hacks to avoid AREG0 use on Sparc hosts. Move cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. Compile the file without HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-08-15TCG: Fix Darwin/ppc calling convention recognitionAndreas Färber
5da79c86a3744e3a901c7986c109dd06951befd2 broke compilation on Mac OS X v10.5 ppc. Apple's GCC 4.0.1 does not define _CALL_DARWIN. Recognize __APPLE__ again as well. Signed-off-by: Andreas F?rber <andreas.faerber@web.de> Cc: malc <av1474@comtv.ru> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: J?rgen Lock <nox@jelal.kn-bremen.de> Cc: Stefan Weil <weil@mail.berlios.de> Signed-off-by: malc <av1474@comtv.ru>
2010-06-29tcg-ppc: Conditionally reserve TCG_GUEST_BASE_REG.Richard Henderson
We need not reserve the register unless we're going to use it. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: malc <av1474@comtv.ru>
2010-06-09tcg: Make some tcg-target.c routines static.Richard Henderson
Both tcg_target_init and tcg_target_qemu_prologue are unused outside of tcg.c. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09tcg: Add TYPE parameter to tcg_out_mov.Richard Henderson
Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64 to perform the move at the proper width, which may elide a REX prefix. Introduce a TCG_TYPE_REG enumerator to represent the "native width" of the host register, and to distinguish the usage from "pointer data" as represented by the existing TCG_TYPE_PTR. Update all targets to match. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-18tcg/ppc: Remove redundant comparison from brcond2malc
Signed-off-by: malc <av1474@comtv.ru>
2010-04-17tcg/ppc: Fix signed versions of brcond2malc
Thanks to: Alexander Graff, Thomas Gleixner and Andreas Faerber. Signed-off-by: malc <av1474@comtv.ru>
2010-04-06tcg/ppc: Fix typomalc
Signed-off-by: malc <av1474@comtv.ru>
2010-04-06tcg/ppc: Implment bswap16/32malc
Signed-off-by: malc <av1474@comtv.ru>
2010-04-05tcg/ppc: Implement eqv, nand and normalc
Signed-off-by: malc <av1474@comtv.ru>
2010-04-05Split TLB addend and target_phys_addr_tPaul Brook
Historically the qemu tlb "addend" field was used for both RAM and IO accesses, so needed to be able to hold both host addresses (unsigned long) and guest physical addresses (target_phys_addr_t). However since the introduction of the iotlb field it has only been used for RAM accesses. This means we can change the type of addend to unsigned long, and remove associated hacks in the big-endian TCG backends. We can also remove the host dependence from target_phys_addr_t. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-04-04tcg/ppc: Fix not_i32malc
Thanks to Alexander Graf for bug report and a good reproducible test case. Signed-off-by: malc <av1474@comtv.ru>
2010-03-26tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.Richard Henderson
Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operands sign-extended in 64-bit registers (regardless of the "real" sign of the operand). For that, we need to be able to distinguish between a 32-bit load with a 32-bit result and a 32-bit load with a given extension to a 64-bit result. This distinction already exists for the ld* loads, but not the qemu_ld* loads. Reserve qemu_ld32u for 64-bit outputs and introduce qemu_ld32 for 32-bit outputs. Adjust all code generators to match. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Allow target-specific implementation of NOR.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Allow target-specific implementation of NAND.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Allow target-specific implementation of EQV.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Use TCGCond where appropriate.Richard Henderson
Use the TCGCond enumeration type in the brcond and setcond related prototypes in tcg-op.h and each code generator. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Name the opcode enumeration.Richard Henderson
Give the enumeration formed from tcg-opc.h a name: TCGOpcode. Use that enumeration type instead of "int" whereever appropriate. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]Paolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13tcg/ppc[64]: Only define addend load helpers in softmmu casemalc
Signed-off-by: malc <av1474@comtv.ru>
2010-02-27tcg/ppc: Fix right rotationmalc
Signed-off-by: malc <av1474@comtv.ru>
2010-02-23tcg/ppc: Fix typomalc
Signed-off-by: malc <av1474@comtv.ru>
2010-02-22tcg/ppc: Implement some of the optional opsmalc
Signed-off-by: malc <av1474@comtv.ru>
2010-02-22tcg: fix build on 32-bit hppa, ppc and sparc hostsJay Foad
The qemu_ld32s op is only defined if TCG_TARGET_REG_BITS == 64. Signed-off-by: Jay Foad <jay.foad@gmail.com> Signed-off-by: malc <av1474@comtv.ru>
2010-02-20tcg: Add comments for all optional instructions not implemented.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-20tcg/ppc: Consistently use calling convention selection macrosmalc
Signed-off-by: malc <av1474@comtv.ru>
2010-02-20Use ppc host calling convention definitions to set ↵Juergen Lock
TCG_TARGET_CALL_{ALIGN_ARGS,STACK_OFFSET}. New version after malc's comments. (This avoids having to do #if defined __linux__ || defined __FreeBSD__ || defined __FreeBSD_kernel__ for the third case.) Submitted by: Andreas Tobler <andreast@fgznet.ch> (original version) Signed-off-by: Juergen Lock <nox@jelal.kn-bremen.de> Signed-off-by: malc <av1474@comtv.ru>
2010-02-07tcg/ppc32: proper setcond implementationmalc
Signed-off-by: malc <av1474@comtv.ru>
2010-02-07tcg/ppc32: implement setcond[2]malc
Signed-off-by: malc <av1474@comtv.ru>
2009-09-27tcg/ppc: always use tcg_out_callmalc
Signed-off-by: malc <av1474@comtv.ru>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-21 13:48:12 +0000