qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer.

Age	Commit message (Expand)	Author
2018-10-02	target/i386: rename HF_SVMI_MASK to HF_GUEST_MASK	Paolo Bonzini
2018-10-02	target/i386: unify masking of interrupts	Paolo Bonzini
2018-10-02	target/i386: move x86_64_hregs to DisasContext	Emilio G. Cota
2018-10-02	target/i386: move cpu_tmp1_i64 to DisasContext	Emilio G. Cota
2018-10-02	target/i386: move cpu_tmp3_i32 to DisasContext	Emilio G. Cota
2018-10-02	target/i386: move cpu_tmp2_i32 to DisasContext	Emilio G. Cota
2018-10-02	target/i386: move cpu_ptr1 to DisasContext	Emilio G. Cota
2018-10-02	target/i386: move cpu_ptr0 to DisasContext	Emilio G. Cota
2018-10-02	target/i386: move cpu_tmp4 to DisasContext	Emilio G. Cota
2018-10-02	target/i386: move cpu_tmp0 to DisasContext	Emilio G. Cota
2018-10-02	target/i386: move cpu_T1 to DisasContext	Emilio G. Cota
2018-10-02	target/i386: move cpu_T0 to DisasContext	Emilio G. Cota
2018-10-02	target/i386: move cpu_A0 to DisasContext	Emilio G. Cota
2018-10-02	target/i386: move cpu_cc_srcT to DisasContext	Emilio G. Cota
2018-10-02	kvm: x86: Fix kvm_arch_fixup_msi_route for remap-less case	Jan Kiszka
2018-10-01	target/xtensa: extract gen_check_interrupts call	Max Filippov
2018-10-01	target/xtensa: make rsr/wsr helpers return void	Max Filippov
2018-10-01	target/xtensa: extract unconditional TB termination via slot 0	Max Filippov
2018-10-01	target/xtensa: always end TB on CCOUNT access/CCOMPARE write	Max Filippov
2018-10-01	target/xtensa: change SR number checks to assertions	Max Filippov
2018-10-01	target/xtensa: extract unconditional TB termination	Max Filippov
2018-10-01	target/xtensa: extract test for division by zero	Max Filippov
2018-10-01	target/xtensa: extract test for cpdisabled exception	Max Filippov
2018-10-01	target/xtensa: extract test for alloca exception	Max Filippov
2018-10-01	target/xtensa: extract test for window underflow exception	Max Filippov
2018-10-01	target/xtensa: extract test for window overflow exception	Max Filippov
2018-10-01	target/xtensa: extract test for debug exception	Max Filippov
2018-10-01	target/xtensa: extract test for syscall instruction	Max Filippov
2018-10-01	target/xtensa: extract test for privileged instruction	Max Filippov
2018-10-01	target/xtensa: extract test for an illegal instruction	Max Filippov
2018-09-25	target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode	Peter Maydell
2018-09-25	target/arm: Fix cpu_get_tb_cpu_state() for non-SVE CPUs	Richard Henderson
2018-09-25	Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20180925' into...	Peter Maydell
2018-09-25	Merge remote-tracking branch 'remotes/xtensa/tags/20180918-xtensa' into staging	Peter Maydell
2018-09-25	target/ppc/cpu-models: Re-group the 970 CPUs together again	Thomas Huth
2018-09-24	Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20180907' into...	Peter Maydell
2018-09-24	Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-pullreq-201809...	Peter Maydell
2018-09-17	target/xtensa: support input from chardev console	Max Filippov
2018-09-17	target/xtensa: fix s32c1i TCGMemOp flags	Max Filippov
2018-09-17	target/xtensa: fix FPU2000 bugs	Max Filippov
2018-09-17	target/xtensa: convert to do_transaction_failed	Max Filippov
2018-09-05	riscv: remove define cpu_init()	Igor Mammedov
2018-09-05	target/riscv: call gen_goto_tb on DISAS_TOO_MANY	Emilio G. Cota
2018-09-05	target/riscv: optimize indirect branches	Emilio G. Cota
2018-09-05	target/riscv: optimize cross-page direct jumps in softmmu	Emilio G. Cota
2018-09-05	target/ppc/kvm: set vcpu as online/offline	Nikunj A Dadhania
2018-09-04	RISC-V: Simplify riscv_cpu_local_irqs_pending	Michael Clark
2018-09-04	RISC-V: Improve page table walker spec compliance	Michael Clark
2018-09-04	RISC-V: Update address bits to support sv39 and sv48	Michael Clark
2018-08-28	target/s390x: use regular spaces in translate.c	Pavel Zbitskiy