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QEMU is a generic and open source machine & userspace emulator and virtualizer.
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2021-01-14
target/mips/translate: Expose check_mips_64() to 32-bit mode
Philippe Mathieu-Daudé
2021-01-14
target/mips/translate: Extract decode_opc_legacy() from decode_opc()
Philippe Mathieu-Daudé
2021-01-14
target/mips: Only build TCG code when CONFIG_TCG is set
Philippe Mathieu-Daudé
2021-01-14
target/mips: Extract FPU specific definitions to translate.h
Philippe Mathieu-Daudé
2021-01-14
target/mips: Declare generic FPU / Coprocessor functions in translate.h
Philippe Mathieu-Daudé
2021-01-14
target/mips: Replace gen_exception_end(EXCP_RI) by gen_rsvd_instruction
Philippe Mathieu-Daudé
2021-01-14
target/mips: Replace gen_exception_err(err=0) by gen_exception_end()
Philippe Mathieu-Daudé
2021-01-14
target/mips/translate: Add declarations for generic code
Philippe Mathieu-Daudé
2021-01-14
target/mips/translate: Extract DisasContext structure
Philippe Mathieu-Daudé
2021-01-14
target/mips: Rename translate_init.c as cpu-defs.c
Philippe Mathieu-Daudé
2021-01-14
target/mips: Move mmu_init() functions to tlb_helper.c
Philippe Mathieu-Daudé
2021-01-14
target/mips: Fix code style for checkpatch.pl
Philippe Mathieu-Daudé
2021-01-14
target/mips: Rename helper.c as tlb_helper.c
Philippe Mathieu-Daudé
2021-01-14
target/mips: Move common helpers from helper.c to cpu.c
Philippe Mathieu-Daudé
2021-01-14
target/mips: Remove consecutive CONFIG_USER_ONLY ifdefs
Philippe Mathieu-Daudé
2021-01-14
target/mips: Add !CONFIG_USER_ONLY comment after #endif
Philippe Mathieu-Daudé
2021-01-14
target/mips: Extract FPU helpers to 'fpu_helper.h'
Philippe Mathieu-Daudé
2021-01-14
target/mips: Inline cpu_state_reset() in mips_cpu_reset()
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Rename ISA_MIPS32R3 as ISA_MIPS_R3
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Rename ISA_MIPS32 as ISA_MIPS_R1
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Use ISA_MIPS32R5 definition to check Release 5
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Use ISA_MIPS32R3 definition to check Release 3
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Use ISA_MIPS32 definition to check Release 1
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Introduce CPU_MIPS64 and cpu_type_is_64bit()
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Rename CPU_MIPSxx Release 1 as CPU_MIPSxxR1
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Reorder CPU_MIPS5 definition
Philippe Mathieu-Daudé
2021-01-14
target/mips/mips-defs: Remove USE_HOST_FLOAT_REGS comment
Philippe Mathieu-Daudé
2021-01-14
target/mips/addr: Add translation helpers for KSEG1
Jiaxun Yang
2021-01-14
target/mips: Replace CP0_Config0 magic values by proper definitions
Philippe Mathieu-Daudé
2021-01-14
target/mips: Add CP0 Config0 register definitions for MIPS3 ISA
Philippe Mathieu-Daudé
2021-01-12
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...
Peter Maydell
2021-01-12
target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns
Peter Maydell
2021-01-12
target/i386: Use X86Seg enum for segment registers
Philippe Mathieu-Daudé
2021-01-12
whpx: move whpx_lapic_state from header to c file
Yonggang Luo
2021-01-12
whpx: move internal definitions to whpx-internal.h
Paolo Bonzini
2021-01-12
whpx: rename whp-dispatch to whpx-internal.h
Paolo Bonzini
2021-01-12
target/arm: add aarch32 ID register fields to cpu.h
Leif Lindholm
2021-01-12
target/arm: add aarch64 ID register fields to cpu.h
Leif Lindholm
2021-01-12
target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h
Leif Lindholm
2021-01-12
target/arm: make ARMCPU.ctr 64-bit
Leif Lindholm
2021-01-12
target/arm: make ARMCPU.clidr 64-bit
Leif Lindholm
2021-01-12
target/arm: fix typo in cpu.h ID_AA64PFR1 field name
Leif Lindholm
2021-01-12
target/arm: enable Small Translation tables in max CPU
Rémi Denis-Courmont
2021-01-12
target/arm: ARMv8.4-TTST extension
Rémi Denis-Courmont
2021-01-08
target/arm: Remove timer_del()/timer_deinit() before timer_free()
Peter Maydell
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