qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer.

Age	Commit message (Expand)	Author
2020-10-29	Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.2-20201028' into...	Peter Maydell
2020-10-29	Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201027-...	Peter Maydell
2020-10-28	Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-20201027' in...	Peter Maydell
2020-10-28	Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-5.2-pull-re...	Peter Maydell
2020-10-28	ppc/: fix some comment spelling errors	zhaolichang
2020-10-28	target/ppc: Fix kvmppc_load_htab_chunk() error reporting	Greg Kurz
2020-10-28	spapr: Unrealize vCPUs with qdev_unrealize()	Greg Kurz
2020-10-27	linux-user: Set PAGE_TARGET_1 for TARGET_PROT_BTI	Richard Henderson
2020-10-27	target/rx: Fix Lesser GPL version number	Chetan Pant
2020-10-27	target/rx: Fix some comment spelling errors	Lichang Zhao
2020-10-27	target/sh4: fix some comment spelling errors	Lichang Zhao
2020-10-27	target/sh4: Update coding style to make checkpatch.pl happy	Philippe Mathieu-Daudé
2020-10-26	Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20201026' into staging	Peter Maydell
2020-10-26	target/xtensa: enable all coprocessors for linux-user	Max Filippov
2020-10-22	target/riscv: raise exception to HS-mode at get_physical_address	Yifei Jiang
2020-10-22	target/riscv: Fix implementation of HLVX.WU instruction	Georg Kotheimer
2020-10-22	target/riscv: Fix update of hstatus.GVA in riscv_cpu_do_interrupt	Georg Kotheimer
2020-10-22	target/riscv: Fix update of hstatus.SPVP	Georg Kotheimer
2020-10-22	riscv: Convert interrupt logs to use qemu_log_mask()	Alistair Francis
2020-10-22	s390x: pv: Fix diag318 PV fencing	Janosch Frank
2020-10-20	target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension	Peter Maydell
2020-10-20	target/arm: Allow M-profile CPUs with FP16 to set FPSCR.FP16	Peter Maydell
2020-10-20	target/arm: Fix has_vfp/has_neon ID reg squashing for M-profile	Peter Maydell
2020-10-20	target/arm: Implement v8.1M low-overhead-loop instructions	Peter Maydell
2020-10-20	target/arm: Implement v8.1M branch-future insns (as NOPs)	Peter Maydell
2020-10-20	target/arm: Don't allow BLX imm for M-profile	Peter Maydell
2020-10-20	target/arm: Make the t32 insn[25:23]=111 group non-overlapping	Peter Maydell
2020-10-20	target/arm: Implement v8.1M conditional-select insns	Peter Maydell
2020-10-20	target/arm: Implement v8.1M NOCP handling	Peter Maydell
2020-10-20	target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11	Richard Henderson
2020-10-20	target/arm: Fix reported EL for mte_check_fail	Richard Henderson
2020-10-20	target/arm: Remove redundant mmu_idx lookup	Richard Henderson
2020-10-20	target/arm: Use tlb_flush_page_bits_by_mmuidx*	Richard Henderson
2020-10-20	target/arm: AArch32 VCVT fixed-point to float is always round-to-nearest	Peter Maydell
2020-10-20	target/arm: Fix SMLAD incorrect setting of Q bit	Peter Maydell
2020-10-19	Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-next-20201017' ...	Peter Maydell
2020-10-17	Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...	Peter Maydell
2020-10-17	hax: unbreak accelerator cpu code after cpus.c split	Claudio Fontana
2020-10-17	target/mips: Increase number of TLB entries on the 34Kf core (16 -> 64)	Philippe Mathieu-Daudé
2020-10-17	target/mips/cpu: Display warning when CPU is used without input clock	Philippe Mathieu-Daudé
2020-10-17	target/mips/cpu: Introduce mips_cpu_create_with_clock() helper	Philippe Mathieu-Daudé
2020-10-17	target/mips/cpu: Allow the CPU to use dynamic frequencies	Philippe Mathieu-Daudé
2020-10-17	target/mips/cpu: Make cp0_count_rate a property	Philippe Mathieu-Daudé
2020-10-17	target/mips/cpu: Calculate the CP0 timer period using the CPU frequency	Philippe Mathieu-Daudé
2020-10-17	target/mips: Move cp0_count_ns to CPUMIPSState	Philippe Mathieu-Daudé
2020-10-17	target/mips/cp0_timer: Document TIMER_PERIOD origin	Philippe Mathieu-Daudé
2020-10-17	target/mips/cp0_timer: Explicit unit in variable name	Philippe Mathieu-Daudé
2020-10-17	target/mips: Move cpu_mips_get_random() with CP0 helpers	Philippe Mathieu-Daudé
2020-10-17	target/mips/op_helper: Log unimplemented cache opcode	Philippe Mathieu-Daudé
2020-10-17	target/mips/op_helper: Document Invalidate/Writeback opcodes as no-op	Philippe Mathieu-Daudé