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2017-09-01microblaze: replace cpu_mb_init() with cpu_generic_init()Igor Mammedov
cpu_mb_init() always falls back to TYPE_MICROBLAZE_CPU object regardless of cpu_model. Put fallback logic into mb_cpu_class_by_name() which would translate any cpu_model into TYPE_MICROBLAZE_CPU class and replace cpu_mb_init() with cpu_generic_init(). Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1503592308-93913-13-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01m68k: replace cpu_m68k_init() with cpu_generic_init()Igor Mammedov
call register_m68k_insns() at realize time which makes cpu_m68k_init() typical object creation function. As result we can replace it with cpu_generic_init() which does the same job, reducing code duplication a bit. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Tested-by: Thomas Huth <huth@tuxfamily.org> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1503592308-93913-12-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01hppa: replace cpu_hppa_init() with cpu_generic_init()Igor Mammedov
drop custom cpu_hppa_init() in favor of cpu_generic_init(), to make cpu_generic_init() work all we need is to provide cc->class_by_name callback that would resolve any cpu_model to the sole TYPE_HPPA_CPU to match current behaviour. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Richard Henderson <rth@twiddle.net> Message-Id: <1503592308-93913-11-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01alpha: replace cpu_alpha_init() with cpu_generic_init()Igor Mammedov
cpu_alpha_init() used to provide default fallback if invalid (i.e. non existent) cpu_model were provided. dp264 machine provides its own default so sole user of fallback is [bsd|linux]-user targets which specifies 'any' cpu model that fallbacks to "ev67" in cpu_alpha_init(). Push fallback handling into alpha_cpu_class_by_name() and replace cpu_alpha_init() with cpu_generic_init(). Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Richard Henderson <rth@twiddle.net> Message-Id: <1503592308-93913-10-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01s390x: replace cpu_s390x_init() with cpu_generic_init()Igor Mammedov
cpu_s390x_init() is used only *-user targets indirectly via cpu_init() macro and has a hack to assign ids to created cpus (I'm not sure if 'id' really matters to *-user emulation). So to on safe side, instead of having custom wrapper to do numbering replace it with cpu_generic_init() and use S390CPUClass::next_cpu_id which could serve the same purpose as static variable and move cpu->id initialization to s390_cpu_initfn for CONFIG_USER_ONLY use-case. PS: ifdef is ugly but it allows us to hide s390x detail that isn't set by *-user targets and reuse generic cpu creation utility for btoh machine and user emulation. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <1504185578-80843-1-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01sparc: replace cpu_sparc_init() with cpu_generic_init()Igor Mammedov
it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1503592308-93913-8-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01sparc: make cpu feature parsing property basedIgor Mammedov
with features converted to properties we can use the same approach as x86 for features parsing and drop legacy approach that manipulated CPU instance directly. New sparc_cpu_parse_features() will allow only +-feat and explicitly disable feat=on|off syntax for now. With that in place and sparc_cpu_parse_features() providing generic CPUClass::parse_features callback, the cpu_sparc_init() will do the same job as cpu_generic_init() so replace content of cpu_sparc_init() with it. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1503672460-109436-1-git-send-email-imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01sparc: move adhoc CPUSPARCState initialization to realize timeIgor Mammedov
SPARCCPU::env was initialized from previously set properties (with help of sparc_cpu_parse_features) in cpu_sparc_register(). However there is not reason to keep it there as this task is typically done at realize time. So move post properties initialization into sparc_cpu_realizefn, which brings cpu_sparc_init() closer to cpu_generic_init(). Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1503592308-93913-6-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01sparc: convert cpu features to qdev propertiesIgor Mammedov
SPARC is the last target that uses legacy way of parsing and initializing cpu features, drop legacy approach and convert features to properties so that SPARC could as minimum benefit from generic cpu_generic_init(), common with x86 +-feat parser PS: the main purpose is to remove legacy way of cpu creation as a blocker for unifying cpu creation code across targets. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1503592308-93913-5-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01sparc: embed sparc_def_t into CPUSPARCStateIgor Mammedov
Make CPUSPARCState::def embedded so it would be allocated as part of cpu instance and we won't have to worry about cleaning def pointer up mannualy on cpu destruction. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1503592308-93913-4-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01sparc: convert cpu models to SPARC cpu subclassesIgor Mammedov
QOMfy cpu models handling introducing propper cpu types for each cpu model. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1503592308-93913-3-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01target-i386/cpu: Add new EPYC CPU modelBrijesh Singh
Add a new base CPU model called 'EPYC' to model processors from AMD EPYC family (which includes EPYC 76xx,75xx,74xx, 73xx and 72xx). The following features bits have been added/removed compare to Opteron_G5 Added: monitor, movbe, rdrand, mmxext, ffxsr, rdtscp, cr8legacy, osvw, fsgsbase, bmi1, avx2, smep, bmi2, rdseed, adx, smap, clfshopt, sha xsaveopt, xsavec, xgetbv1, arat Removed: xop, fma4, tbm Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Tom Lendacky <Thomas.Lendacky@amd.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Message-Id: <20170815170051.127257-1-brijesh.singh@amd.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01hmp: allow apic-id for "info lapic"Yi Wang
Add [apic-id] support for hmp command "info lapic", which is useful when debugging ipi and so on. Current behavior is not changed when the parameter isn't specified. Signed-off-by: Yi Wang <wang.yi59@zte.com.cn> Signed-off-by: Yun Liu <liu.yunh@zte.com.cn> Message-Id: <1501049917-4701-3-git-send-email-wang.yi59@zte.com.cn> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-08-31Merge remote-tracking branch 'remotes/elmarco/tags/tidy-pull-request' into ↵Peter Maydell
staging # gpg: Signature made Thu 31 Aug 2017 11:29:33 BST # gpg: using RSA key 0xDAE8E10975969CE5 # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * remotes/elmarco/tags/tidy-pull-request: (29 commits) eepro100: replace g_malloc()+memcpy() with g_memdup() test-iov: replace g_malloc()+memcpy() with g_memdup() i386: replace g_malloc()+memcpy() with g_memdup() i386: introduce ELF_NOTE_SIZE macro decnumber: use DIV_ROUND_UP kvm: use DIV_ROUND_UP i386/dump: use DIV_ROUND_UP ppc: use DIV_ROUND_UP msix: use DIV_ROUND_UP usb-hub: use DIV_ROUND_UP q35: use DIV_ROUND_UP piix: use DIV_ROUND_UP virtio-serial: use DIV_ROUND_UP console: use DIV_ROUND_UP monitor: use DIV_ROUND_UP virtio-gpu: use DIV_ROUND_UP vga: use DIV_ROUND_UP ui: use DIV_ROUND_UP vnc: use DIV_ROUND_UP vvfat: use DIV_ROUND_UP ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-08-31i386: introduce ELF_NOTE_SIZE macroMarc-André Lureau
Factour out a common pattern to compute the ELF note size. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2017-08-31i386/dump: use DIV_ROUND_UPMarc-André Lureau
I used the clang-tidy qemu-round check to generate the fix: https://github.com/elmarco/clang-tools-extra Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2017-08-31ppc: use DIV_ROUND_UPMarc-André Lureau
I used the clang-tidy qemu-round check to generate the fix: https://github.com/elmarco/clang-tools-extra Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Richard Henderson <rth@twiddle.net>
2017-08-31i386: use ROUND_UP macroMarc-André Lureau
I used the clang-tidy qemu-round check (with the option OnlyAlignUp) to generate the fix: https://github.com/elmarco/clang-tools-extra Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2017-08-30target/s390x: cleanup cpu.hDavid Hildenbrand
Let's reshuffle the function prototypes so we get a cleaner outline of the files. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-19-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30s390x/kvm: move KVM declarations and stubs to separate filesDavid Hildenbrand
Let's do it just like the other architectures. Introduce kvm-stub.c for stubs and kvm_s390x.h for the declarations. Change license to GPL2+ and keep copyright notice. As we are dropping the sysemu/kvm.h include from cpu.h, fix up includes. Suggested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-18-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30s390x: avoid calling kvm_ functions outside of target/s390x/David Hildenbrand
Let's just introduce an helper. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-17-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30target/s390x: move a couple of functions to cpu.cDavid Hildenbrand
Prepare to move more stuff (especially KVM related) from cpu.h to internal.h. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-16-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30target/s390x: introduce internal.hDavid Hildenbrand
cpu.h should only contain what really has to be accessed outside of target/s390x/. Add internal.h which can only be used inside target/s390x/. Move everything that isn't fast enough to run away and restructure it right away. We'll move all kvm_* stuff later. Minor style fixes to avoid checkpatch warning to: - struct Lowcore: "{" goes into same line as typedef - struct LowCore: add spaces around "-" in array length calculations - time2tod() and tod2time(): move "{" to separate line - get_per_atmid(): add space between ")" and "?". Move cases by one char. - get_per_atmid(): drop extra paremthesis around (1 << 6) Change license of new file to GPL2+ and keep copyright notice. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-15-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30target/s390x: move get_per_in_range() to misc_helper.cDavid Hildenbrand
Only used in that file. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-14-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30target/s390x: move s390_do_cpu_reset() to diag.cDavid Hildenbrand
Only used in that file. Also drop the comment, not really needed. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-13-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30target/s390x: move psw_key_valid() to mem_helper.cDavid Hildenbrand
Only used in that file. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-12-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30target/s390x: move cpu_mmu_idx_to_asc() to excp_helper.cDavid Hildenbrand
Only used in that file. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-11-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30target/s390x: move cc_name() to helper.cDavid Hildenbrand
While at it, move the translations into the function and properly pass enum cc_op as parameter. We can't move it to cc_helper.c as this would break --disable-tcg. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-10-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30target/s390x: move gtod_*() declarations to s390-virtio.hDavid Hildenbrand
The functions are not used in target/s390x/ so a header in hw/s390x/ is a better place. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-9-david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30s390x: drop inclusion of sysemu/kvm.h from some filesDavid Hildenbrand
s390-stattrib.c needs definition of TARGET_PAGE_SIZE, solve it via cpu.h. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-8-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30s390x/cpumodel: factor out determination of default model nameDavid Hildenbrand
Now we can drop inclusion of "sysemu/kvm.h" from "s390-virtio.c". Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-7-david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30s390x/kvm: drop KVMState parameter from kvm_s390_set_mem_limit()David Hildenbrand
Not needed at that point. Also drop it from kvm_s390_query_mem_limit() we call in kvm_s390_set_mem_limit(). Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-3-david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30s390x/kvm: drop KVMState parameter from s390_get_memslot_count()David Hildenbrand
Not needed at that point. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170818114353.13455-2-david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30s390x/pci: fence off instructions for non-pciCornelia Huck
If a guest running on a machine without zpci issues a pci instruction, throw them an exception. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Halil Pasic <pasic@linux.vnet.ibm.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30s390x/pci: do not advertise pci on non-pci buildsCornelia Huck
Only set the zpci feature bit on builds that actually support pci. Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30s390x: chsc nt2 events are pci-onlyCornelia Huck
The nt2 event class is pci-only - don't look for events if pci is not in the active cpu model. Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30s390x: wire up diag288 in tcgCornelia Huck
Make the diag288 watchdog useable via tcg as well. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-30s390x/tcg: specification exception for unknown diagCornelia Huck
While the PoP is silent on the issue, z/VM documentation states that unknown diagnose codes trigger a specification exception. We already do that when running with kvm, so change tcg to do so as well. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-08-22ppc: fix ppc_set_compat() with KVM PRGreg Kurz
When running in KVM PR mode, kvmppc_set_compat() always fail because the current PR implementation doesn't handle KVM_REG_PPC_ARCH_COMPAT. Now that the machine code inconditionally calls ppc_set_compat_all() at reset time to restore the compat mode default value (commit 66d5c492dd3a9), it is impossible to start a guest with PR: qemu-system-ppc64: Unable to set CPU compatibility mode in KVM: Invalid argument A tentative patch [1] was recently sent by Suraj to address the issue, but it would prevent the compat mode to be turned off on reset. And we really don't want to explicitely check for KVM PR. During the patch's review, David suggested that we should only call the KVM ioctl() if the compat PVR changes. This allows at least to run with KVM PR, provided no compat mode is requested from the command line (which should be the case when running PR nested). This is what this patch does. While here, we also fix the side effect where KVM would fail but we would change the CPU state in QEMU anyway. [1] http://patchwork.ozlabs.org/patch/782039/ Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-08-22target/ppc: 'PVR != host PVR' in KVM_SET_SREGS workaroundDaniel Henrique Barboza
Commit d5fc133eed ("ppc: Rework CPU compatibility testing across migration") changed the way cpu_post_load behaves with the PVR setting, causing an unexpected bug in KVM-HV migrations between hosts that are compatible (POWER8 and POWER8E, for example). Even with pvr_match() returning true, the guest freezes right after cpu_post_load. The reason is that the guest kernel can't handle a different PVR value other that the running host in KVM_SET_SREGS. In [1] it was discussed the possibility of a new KVM capability that would indicate that the guest kernel can handle a different PVR in KVM_SET_SREGS. Even if such feature is implemented, there is still the problem with older kernels that will not have this capability and will fail to migrate. This patch implements a workaround for that scenario. If running with KVM, check if the guest kernel does not have the capability (named here as 'cap_ppc_pvr_compat'). If it doesn't, calls kvmppc_is_pr() to see if the guest is running in KVM-HV. If all this happens, set env->spr[SPR_PVR] to the same value as the current host PVR. This ensures that we allow migrations with 'close enough' PVRs to still work in KVM-HV but also makes the code ready for this new KVM capability when it is done. A new function called 'kvmppc_pvr_workaround_required' was created to encapsulate the conditions said above and to avoid calling too many kvm.c internals inside cpu_post_load. [1] https://lists.gnu.org/archive/html/qemu-ppc/2017-06/msg00503.html Signed-off-by: Daniel Henrique Barboza <danielhb@linux.vnet.ibm.com> [dwg: Fix for the case of using TCG on a PPC host] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-08-15target/arm: Require alignment for load exclusiveAlistair Francis
According to the ARM ARM exclusive loads require the same alignment as exclusive stores. Let's update the memops used for the load to match that of the store. This adds the alignment requirement to the memops. Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20170815145714.17635-4-richard.henderson@linaro.org [rth: Require 16-byte alignment for 64-bit LDXP.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-08-15target/arm: Correct load exclusive pair atomicityRichard Henderson
We are not providing the required single-copy atomic semantics for the 64-bit operation that is the 32-bit paired load. At the same time, leave the entire 64-bit value in cpu_exclusive_val and stop writing to cpu_exclusive_high. This means that we do not have to re-assemble the 64-bit quantity when it comes time to store. At the same time, drop a redundant temporary and perform all loads directly into the cpu_exclusive_* globals. Tested-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20170815145714.17635-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-08-15target/arm: Correct exclusive store cmpxchg memop maskAlistair Francis
When we perform the atomic_cmpxchg operation we want to perform the operation on a pair of 32-bit registers. Previously we were just passing the register size in which was set to MO_32. This would result in the high register to be ignored. To fix this issue we hardcode the size to be 64-bits long when operating on 32-bit pairs. Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Portia Stephens <portia.stephens@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20170815145714.17635-2-richard.henderson@linaro.org Message-Id: <bc18dddca56e8c2ea4a3def48d33ceb5d21d1fff.1502488636.git.alistair.francis@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-08-14unicore32: abort when entering "x 0" on the monitorEduardo Otubo
Starting Qemu with "qemu-system-unicore32 -M puv3,accel=qtest -S -nographic" and entering "x 0 " at the monitor prompt leads to abort(): $ ./unicore32-softmmu/qemu-system-unicore32 -M puv3,accel=qtest -S -nographic QEMU 2.9.90 monitor - type 'help' for more information (qemu) x 0 qemu: fatal: uc32_cpu_get_phys_page_debug not supported yet R00=00000000 R01=00000000 R02=00000000 R03=00000000 R04=00000000 R05=00000000 R06=00000000 R07=00000000 R08=00000000 R09=00000000 R10=00000000 R11=00000000 R12=00000000 R13=00000000 R14=00000000 R15=00000000 R16=00000000 R17=00000000 R18=00000000 R19=00000000 R20=00000000 R21=00000000 R22=00000000 R23=00000000 R24=00000000 R25=00000000 R26=00000000 R27=00000000 R28=00000000 R29=00000000 R30=00000000 R31=03000000 PSR=40000013 -Z-- PRIV Aborted (core dumped) This happens because uc32_cpu_get_phys_page_debug() is not implemented yet, this is a temporary workaround to avoid the crash. Signed-off-by: Eduardo Otubo <otubo@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-08-09target/ppc: Add stub implementation of the PSSCRDavid Gibson
The PSSCR register added in POWER9 controls certain power saving mode behaviours. Mostly, it's not relevant to TCG, however because qemu doesn't know about it yet, it doesn't synchronize the state with KVM, and thus it doesn't get migrated. To fix that, this adds a minimal stub implementation of the register. This isn't complete, even to the extent that an implementation is possible in TCG, just enough to get migration working. We need to come back later and at least properly filter the various fields in the register based on privilege level. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
2017-08-09target/ppc: Implement TIDRDavid Gibson
This adds a trivial implementation of the TIDR register added in POWER9. This isn't particularly important to qemu directly - it's used by accelerator modules that we don't emulate. However, since qemu isn't aware of it, its state is not synchronized with KVM and therefore not migrated, which can be a problem. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
2017-08-09ppc: fix double-free in cpu_post_load()Greg Kurz
When running nested with KVM PR, ppc_set_compat() fails and QEMU crashes because of "double free or corruption (!prev)". The crash happens because error_report_err() has already called error_free(). Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-08-09booke206: fix MAS update on tlb missKONRAD Frederic
When a tlb instruction miss happen, rw is set to 0 at the bottom of cpu_ppc_handle_mmu_fault which cause the MAS update function to miss the SAS and TS bit in MAS6, MAS1 in booke206_update_mas_tlb_miss. Just calling booke206_update_mas_tlb_miss with rw = 2 solve the issue. Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-08-08Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
* --help/--version improvements (Eric) * GCC 7 workaround (Greg) * Small SCSI fix (Hannes) * SSE 4.1 fix (Joseph) * RCU deadlock fix (myself) # gpg: Signature made Tue 08 Aug 2017 16:28:56 BST # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: maint: Include bug-reporting info in --help output qga: Give more --version information qemu-io: Give more --version information qemu-img: Sort sub-command names in --help target/i386: set rip_offset for some SSE4.1 instructions scsi: clarify sense codes for LUN0 emulation kvm: workaround build break on gcc-7.1.1 / fedora26 Revert "rcu: do not create thread in pthread_atfork callback" rcu: completely disable pthread_atfork callbacks as soon as possible Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-08-08target/i386: set rip_offset for some SSE4.1 instructionsJoseph Myers
When emulating various SSE4.1 instructions such as pinsrd, the address of a memory operand is computed without allowing for the 8-bit immediate operand located after the memory operand, meaning that the memory operand uses the wrong address in the case where it is rip-relative. This patch adds the required rip_offset setting for those instructions, so fixing some GCC test failures (13 in the gcc testsuite in my GCC 6-based testing) when testing with a default CPU setting enabling those instructions. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.20.1708080041391.28702@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>