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2020-08-25target/riscv: Support the Virtual Instruction faultAlistair Francis
2020-08-25target/riscv: Return the exception from invalid CSR accessesAlistair Francis
2020-08-25target/riscv: Support the v0.6 Hypervisor extension CRSsAlistair Francis
2020-08-25target/riscv: Only support little endian guestsAlistair Francis
2020-08-25target/riscv: Only support a single VSXL lengthAlistair Francis
2020-08-25target/riscv: Update the CSRs to the v0.6 Hyp extensionAlistair Francis
2020-08-25target/riscv: Update the Hypervisor trap return/entryAlistair Francis
2020-08-25target/riscv: Fix the interrupt cause codeAlistair Francis
2020-08-25target/riscv: Convert MSTATUS MTL to GVAAlistair Francis
2020-08-25target/riscv: Don't allow guest to write to htinstAlistair Francis
2020-08-25target/riscv: Do two-stage lookups on hlv/hlvx/hsv instructionsAlistair Francis
2020-08-25target/riscv: Allow generating hlv/hlvx/hsv instructionsAlistair Francis
2020-08-25target/riscv: Allow setting a two-stage lookup in the virt statusAlistair Francis
2020-08-24Merge remote-tracking branch 'remotes/xtensa/tags/20200821-xtensa' into stagingPeter Maydell
2020-08-24Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2020-08-24...Peter Maydell
2020-08-24Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200824'...Peter Maydell
2020-08-24target/arm: Use correct FPST for VCMLA, VCADD on fp16Peter Maydell
2020-08-24target/arm: Implement FPST_STD_F16 fpstatusPeter Maydell
2020-08-24target/arm: Make A32/T32 use new fpstatus_ptr() APIPeter Maydell
2020-08-24target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr()Peter Maydell
2020-08-24target/arm: Delete unused ARM_FEATURE_CRCPeter Maydell
2020-08-24target/arm/translate.c: Delete/amend incorrect commentsPeter Maydell
2020-08-24target/arm: Delete unused VFP_DREG macrosPeter Maydell
2020-08-24target/arm: Remove ARCH macroPeter Maydell
2020-08-24target/arm: Convert T32 coprocessor insns to decodetreePeter Maydell
2020-08-24target/arm: Do M-profile NOCP checks early and via decodetreePeter Maydell
2020-08-24target/arm: Tidy up disas_arm_insn()Peter Maydell
2020-08-24target/arm: Convert A32 coprocessor insns to decodetreePeter Maydell
2020-08-24target/arm: Separate decode from handling of coproc insnsPeter Maydell
2020-08-24target/arm: Pull handling of XScale insns out of disas_coproc_insn()Peter Maydell
2020-08-24target/microblaze: mbar: Trap sleeps from user-spaceEdgar E. Iglesias
2020-08-24target/microblaze: swx: Use atomic_cmpxchgEdgar E. Iglesias
2020-08-24target/microblaze: mbar: Add support for data-access barriersEdgar E. Iglesias
2020-08-24target/microblaze: mbar: Move LOG_DIS to before sleepEdgar E. Iglesias
2020-08-24target/microblaze: mbar: Transfer dc->rd to mbar_immEdgar E. Iglesias
2020-08-24Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.2-20200818' into...Peter Maydell
2020-08-23Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200...Peter Maydell
2020-08-21target/riscv: Change the TLB page size depends on PMP entries.Zong Li
2020-08-21target/riscv: Fix the translation of physical addressZong Li
2020-08-21riscv: Fix bug in setting pmpcfg CSR for RISCV64Hou Weiying
2020-08-21target/riscv: check before allocating TCG tempsLIU Zhiwei
2020-08-21target/riscv: Clean up fmv.w.xLIU Zhiwei
2020-08-21target/riscv: Check nanboxed inputs in trans_rvf.inc.cRichard Henderson
2020-08-21target/riscv: Check nanboxed inputs to fp helpersRichard Henderson
2020-08-21target/riscv: Generate nanboxed results from trans_rvf.inc.cRichard Henderson
2020-08-21target/riscv: Generalize gen_nanbox_fpr to gen_nanbox_sRichard Henderson
2020-08-21target/riscv: Generate nanboxed results from fp helpersRichard Henderson
2020-08-21target/xtensa: import DSP3400 coreMax Filippov
2020-08-21target/xtensa: import de233_fpu coreMax Filippov
2020-08-21target/xtensa: implement FPU division and square rootMax Filippov