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QEMU is a generic and open source machine & userspace emulator and virtualizer.
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Author
2019-05-21
Merge remote-tracking branch 'remotes/xtensa/tags/20190520-xtensa' into staging
Peter Maydell
2019-05-16
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190510' into staging
Peter Maydell
2019-05-15
target/xtensa: implement exclusive access option
Max Filippov
2019-05-15
target/xtensa: update list of exception causes
Max Filippov
2019-05-15
target/xtensa: implement block prefetch option opcodes
Max Filippov
2019-05-14
target/xtensa: implement DIWBUI.P opcode
Max Filippov
2019-05-13
target/xtensa: Use tcg_gen_abs_i32
Richard Henderson
2019-05-13
Clean up decorations and whitespace around header guards
Markus Armbruster
2019-05-13
target/xtensa: Clean up core-isa.h header guards
Markus Armbruster
2019-05-10
target/xtensa: implement MPU option
Max Filippov
2019-05-10
target/xtensa: add parity/ECC option SRs
Max Filippov
2019-05-10
target/xtensa: define IDMA and gather/scatter IRQ types
Max Filippov
2019-05-10
target/xtensa: make internal MMU functions static
Max Filippov
2019-05-10
target/xtensa: get rid of centralized SR properties
Max Filippov
2019-05-10
tcg: Use CPUClass::tlb_fill in cputlb.c
Richard Henderson
2019-05-10
target/xtensa: Convert to CPUClass::tlb_fill
Richard Henderson
2019-04-24
tcg: Hoist max_insns computation to tb_gen_code
Richard Henderson
2019-04-18
qom/cpu: Simplify how CPUClass:cpu_dump_state() prints
Markus Armbruster
2019-04-18
target: Clean up how the dump_mmu() print
Markus Armbruster
2019-04-18
target: Simplify how the TARGET_cpu_list() print
Markus Armbruster
2019-03-23
target/xtensa: don't announce exit simcall
Max Filippov
2019-03-21
target/xtensa: fix break_dependency for repeated resources
Max Filippov
2019-02-28
target/xtensa: implement PREFCTL SR
Max Filippov
2019-02-28
target/xtensa: prioritize load/store in FLIX bundles
Max Filippov
2019-02-28
target/xtensa: break circular register dependencies
Max Filippov
2019-02-28
target/xtensa: reorganize access to boolean registers
Max Filippov
2019-02-28
target/xtensa: reorganize access to MAC16 registers
Max Filippov
2019-02-28
target/xtensa: reorganize register handling in translators
Max Filippov
2019-02-28
target/xtensa: only rotate window in the retw helper
Max Filippov
2019-02-28
target/xtensa: move WINDOW_BASE SR update to postprocessing
Max Filippov
2019-02-28
target/xtensa: add generic instruction post-processing
Max Filippov
2019-02-28
target/xtensa: sort FLIX instruction opcodes
Max Filippov
2019-02-18
target/xtensa: implement wide branches and loops
Max Filippov
2019-02-18
target/xtensa: allow multiple names for single opcode
Max Filippov
2019-02-18
target/xtensa: don't require opcode table sorting
Max Filippov
2019-02-18
target/xtensa: move xtensa_finalize_config to xtensa_core_class_init
Max Filippov
2019-02-18
target/xtensa: fixup test_mmuhifi_c3 overlay
Max Filippov
2019-02-11
target/xtensa: get rid of gen_callw[i]
Max Filippov
2019-02-10
target/xtensa: don't specify windowed registers manually
Max Filippov
2019-02-08
target/xtensa/import_core.sh: don't add duplicate 'static'
Max Filippov
2019-01-28
target/xtensa: add test_mmuhifi_c3 core
Max Filippov
2019-01-28
target/xtensa: expose core runstall as an IRQ line
Max Filippov
2019-01-28
target/xtensa: rearrange access to external interrupts
Max Filippov
2019-01-28
target/xtensa: drop function xtensa_timer_irq
Max Filippov
2019-01-24
target/xtensa: fix access to the INTERRUPT SR
Max Filippov
2019-01-24
target/xtensa: add qemu_cpu_kick to xtensa_runstall
Max Filippov
2019-01-13
target/xtensa: move non-HELPER functions to helper.c
Max Filippov
2019-01-13
target/xtensa: drop dump_state helper
Max Filippov
2019-01-13
target/xtensa: extract interrupt and exception helpers
Max Filippov
2019-01-13
target/xtensa: extract debug helpers
Max Filippov
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