qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer.

Age	Commit message (Expand)	Author
2021-10-05	target/xtensa: list cores in a text file	Paolo Bonzini
2021-09-21	hw/core: Make do_unaligned_access noreturn	Richard Henderson
2021-09-21	include/exec: Move cpu_signal_handler declaration	Richard Henderson
2021-09-14	target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé
2021-09-14	target/xtensa: Restrict do_transaction_failed() to sysemu	Philippe Mathieu-Daudé
2021-09-14	accel/tcg: Add DisasContextBase argument to translator_ld*	Ilya Leoshkevich
2021-07-21	accel/tcg: Remove TranslatorOps.breakpoint_check	Richard Henderson
2021-07-12	Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...	Peter Maydell
2021-07-11	Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...	Peter Maydell
2021-07-09	target/xtensa/xtensa-semi: Fix compilation problem on Haiku	Thomas Huth
2021-07-09	target/xtensa: Use translator_use_goto_tb	Richard Henderson
2021-07-09	tcg: Avoid including 'trace-tcg.h' in target translate.c	Philippe Mathieu-Daudé
2021-07-09	meson: Introduce target-specific Kconfig	Philippe Mathieu-Daudé
2021-05-26	hw/core: Constify TCGCPUOps	Richard Henderson
2021-05-26	cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps	Philippe Mathieu-Daudé
2021-05-26	cpu: Introduce SysemuCPUOps structure	Philippe Mathieu-Daudé
2021-05-26	cpu: Assert DeviceClass::vmsd is NULL on user emulation	Philippe Mathieu-Daudé
2021-05-20	target/xtensa: clean up unaligned access	Max Filippov
2021-05-20	target/xtensa: fix access ring in l32ex	Max Filippov
2021-05-20	target/xtensa: don't generate extra EXCP_DEBUG on exception	Max Filippov
2021-05-20	target/xtensa: Make sure that tb->size != 0	Ilya Leoshkevich
2021-05-02	Do not include exec/address-spaces.h if it's not really necessary	Thomas Huth
2021-04-03	target/xtensa: make xtensa_modules static on import	Max Filippov
2021-04-03	target/xtensa: fix meson.build rule for xtensa cores	Max Filippov
2021-03-10	semihosting: Move include/hw/semihosting/ -> include/semihosting/	Philippe Mathieu-Daudé
2021-02-05	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	Claudio Fontana
2021-02-05	cpu: move do_unaligned_access to tcg_ops	Claudio Fontana
2021-02-05	cpu: move cc->transaction_failed to tcg_ops	Claudio Fontana
2021-02-05	cpu: move cc->do_interrupt to tcg_ops	Claudio Fontana
2021-02-05	cpu: Move debug_excp_handler to tcg_ops	Eduardo Habkost
2021-02-05	cpu: Move tlb_fill to tcg_ops	Eduardo Habkost
2021-02-05	cpu: Move cpu_exec_* to tcg_ops	Eduardo Habkost
2021-02-05	cpu: Introduce TCGCpuOperations struct	Eduardo Habkost
2020-11-15	xtensa tcg cpus: Fix Lesser GPL version number	Chetan Pant
2020-11-13	hmp: Pass monitor to mon_get_cpu_env()	Kevin Wolf
2020-10-26	target/xtensa: enable all coprocessors for linux-user	Max Filippov
2020-09-23	qemu/atomic.h: rename atomic_ to qatomic_	Stefan Hajnoczi
2020-09-18	qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros	Eduardo Habkost
2020-09-09	Use OBJECT_DECLARE_TYPE where possible	Eduardo Habkost
2020-09-09	Use DECLARE_CHECKER macros	Eduardo Habkost
2020-09-09	Move QOM typedefs and add missing includes	Eduardo Habkost
2020-08-21	target/xtensa: import DSP3400 core	Max Filippov
2020-08-21	target/xtensa: import de233_fpu core	Max Filippov
2020-08-21	target/xtensa: implement FPU division and square root	Max Filippov
2020-08-21	target/xtensa: add DFPU registers and opcodes	Max Filippov
2020-08-21	target/xtensa: add DFPU option	Max Filippov
2020-08-21	target/xtensa: don't access BR regfile directly	Max Filippov
2020-08-21	target/xtensa: move FSR/FCR register accessors	Max Filippov
2020-08-21	target/xtensa: rename FPU2000 translators and helpers	Max Filippov
2020-08-21	target/xtensa: support copying registers up to 64 bits wide	Max Filippov