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path: root/target/sparc/cpu.h
AgeCommit message (Expand)Author
2020-03-17gdbstub: extend GByteArray to read register helpersAlex Bennée
2019-11-06target/sparc: Define an enumeration for accessing env->regwptrRichard Henderson
2019-09-17target/sparc: Switch to do_transaction_failed() hookPeter Maydell
2019-09-03target/sparc: sun4u Invert Endian TTE bitTony Nguyen
2019-08-20configure: Define target access alignment in configuretony.nguyen@bt.com
2019-08-16migration: Move the VMStateDescription typedef to typedefs.hMarkus Armbruster
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster
2019-06-10cpu: Remove CPU_COMMONRichard Henderson
2019-06-10cpu: Introduce CPUNegativeOffsetStateRichard Henderson
2019-06-10cpu: Move ENV_OFFSET to exec/gen-icount.hRichard Henderson
2019-06-10target/sparc: Use env_cpu, env_archcpuRichard Henderson
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson
2019-06-10cpu: Define ArchCPURichard Henderson
2019-06-10cpu: Define CPUArchState with typedefRichard Henderson
2019-06-10tcg: Split out target/arch/cpu-param.hRichard Henderson
2019-05-10target/sparc: Convert to CPUClass::tlb_fillRichard Henderson
2019-04-18qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster
2019-04-18target: Clean up how the dump_mmu() printMarkus Armbruster
2019-04-18target: Simplify how the TARGET_cpu_list() printMarkus Armbruster
2018-03-19cpu: get rid of unused cpu_init() definesIgor Mammedov
2018-03-19cpu: add CPU_RESOLVING_TYPE macroIgor Mammedov
2018-02-21target/*/cpu.h: remove softfloat.hAlex Bennée
2018-01-25accel/tcg: add size paremeter in tlb_fill()Laurent Vivier
2017-10-27sparc: cleanup cpu type name compositionIgor Mammedov
2017-10-24qom: Introduce CPUClass.tcg_initializeRichard Henderson
2017-09-14sparc: Fix typedef clashDr. David Alan Gilbert
2017-09-01sparc: replace cpu_sparc_init() with cpu_generic_init()Igor Mammedov
2017-09-01sparc: embed sparc_def_t into CPUSPARCStateIgor Mammedov
2017-01-18target-sparc: store the UA2005 entries in sun4u formatArtyom Tarasenko
2017-01-18target-sparc: implement UA2005 TSB PointersArtyom Tarasenko
2017-01-18target-sparc: use SparcV9MMU type for sparc64 I/D-MMUsArtyom Tarasenko
2017-01-18target-sparc: use direct address translation in hyperprivileged modeArtyom Tarasenko
2017-01-18target-sparc: implement UA2005 GL registerArtyom Tarasenko
2017-01-18target-sparc: implement UA2005 hypervisor trapsArtyom Tarasenko
2017-01-18target-sparc: hypervisor mode takes over nucleus modeArtyom Tarasenko
2017-01-18target-sparc: implement UA2005 scratchpad registersArtyom Tarasenko
2017-01-18target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor modeArtyom Tarasenko
2017-01-18target-sparc: add UltraSPARC T1 TLB #definesArtyom Tarasenko
2017-01-18target-sparc: add UA2005 TTE bit #definesArtyom Tarasenko
2017-01-18target-sparc: use explicit mmu register pointersArtyom Tarasenko
2017-01-18target-sparc: store cpu super- and hypervisor flags in TBArtyom Tarasenko
2017-01-18target-sparc: ignore MMU-faults if MMU is disabled in hypervisor modeArtyom Tarasenko
2017-01-13qom/cpu: move tlb_flush to cpu_common_resetAlex Bennée
2016-12-20Move target-* CPU file into a target/ folderThomas Huth
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