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path: root/target/riscv/vector_helper.c
AgeCommit message (Expand)Author
2021-12-20target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmo...Frank Chang
2021-12-20target/riscv: rvv-1.0: add vector unit-stride mask load/store insnsFrank Chang
2021-12-20target/riscv: rvv-1.0: add evl parameter to vext_ldst_us()Frank Chang
2021-12-20target/riscv: rvv-1.0: floating-point reciprocal estimate instructionFrank Chang
2021-12-20target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruc...Frank Chang
2021-12-20target/riscv: rvv-1.0: implement vstart CSRFrank Chang
2021-12-20target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bitsFrank Chang
2021-12-20target/riscv: rvv-1.0: narrowing floating-point/integer type-convertFrank Chang
2021-12-20target/riscv: rvv-1.0: widening floating-point/integer type-convertFrank Chang
2021-12-20target/riscv: rvv-1.0: floating-point min/max instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: remove vmford.vv and vmford.vfFrank Chang
2021-12-20target/riscv: rvv-1.0: remove widening saturating scaled multiply-addFrank Chang
2021-12-20target/riscv: rvv-1.0: single-width floating-point reductionFrank Chang
2021-12-20target/riscv: rvv-1.0: narrowing fixed-point clip instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: floating-point slide instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: slide instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: mask-register logical instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: floating-point compare instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: integer comparison instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: narrowing integer right shift instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrowFrank Chang
2021-12-20target/riscv: rvv-1.0: single-width averaging add and subtract instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: integer extension instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: register gather instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: set-X-first mask bit instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: find-first-set mask bit instructionFrank Chang
2021-12-20target/riscv: rvv-1.0: count population in mask instructionFrank Chang
2021-12-20target/riscv: rvv-1.0: update vext_max_elems() for load/store insnsFrank Chang
2021-12-20target/riscv: rvv-1.0: load/store whole register instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: fault-only-first unit stride loadFrank Chang
2021-12-20target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store i...Frank Chang
2021-12-20target/riscv: rvv-1.0: index load and store instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: stride load and store instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: configure instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: remove amo operations instructionsFrank Chang
2021-12-20target/riscv: rvv-1.0: add VMA and VTAFrank Chang
2021-12-20target/riscv: rvv-1.0: add fractional LMULFrank Chang
2021-12-20target/riscv: rvv-1.0: remove MLEN calculationsFrank Chang
2021-12-20target/riscv: Use FIELD_EX32() to extract wd fieldFrank Chang
2021-05-11target/riscv: Consolidate RV32/64 32-bit instructionsAlistair Francis
2021-05-11target/riscv: fix vrgather macro index variable type bugFrank Chang
2021-05-11target/riscv: Fixup saturate subtract functionLIU Zhiwei
2020-08-28softfloat: Implement the full set of comparisons for float16Kito Cheng
2020-08-05target/riscv/vector_helper: Fix build on 32-bit big endian hostsThomas Huth
2020-07-02target/riscv: vector compress instructionLIU Zhiwei
2020-07-02target/riscv: vector register gather instructionLIU Zhiwei
2020-07-02target/riscv: vector slide instructionsLIU Zhiwei
2020-07-02target/riscv: vector element index instructionLIU Zhiwei
2020-07-02target/riscv: vector iota instructionLIU Zhiwei
2020-07-02target/riscv: set-X-first mask bitLIU Zhiwei
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